Patent classifications
H03H11/1213
Feed-forward filtering device and associated method
A filtering device includes a low-pass filter (LPF), a noise estimation circuit and a first combining circuit. The LPF receives and filters a pre-filtering signal to generate an output signal of the filtering device. The noise estimation circuit estimates an estimated noise signal according to the output signal and the pre-filtering signal. The first combining circuit subtracts the estimated noise signal from an input signal of the filtering device to generate the pre-filtering signal.
Area-efficient dynamic capacitor circuit for noise reduction in VLSI circuits
A dynamic capacitor circuit having a first passive capacitor, a second passive capacitor, a first terminal of the first passive capacitor and a first terminal of the second passive capacitor connected together to receive an input signal through a resistor. The input signal includes a noise signal component. An alternating current (AC) coupled inverting amplifier has an input connecting a second terminal of the second passive capacitor, the second capacitor coupling the input signal to the AC coupled inverting amplifier input. A conductive path couples an output of the AC coupled inverting amplifier to a second terminal of the first passive capacitor to balance out any noise signal component of the input AC signal at the connection. The dynamic capacitor achieves an amount of noise reduction in a reduced space without applying deep trench capacitors (DTCAP) where the DTCAP is a capacitance formed in a plane perpendicular to the substrate.
High linearly WiGig baseband amplifier with channel select filter
A circuit comprises a Sallen-Key filter, which includes a source follower that implements a unity-gain amplifier; and a programmable-gain amplifier coupled to the Sallen-Key filter. The circuit enables programmable gain via adjustment to a current mirror copying ratio in the programmable-gain amplifier, which decouples the bandwidth of the circuit from its gain settings. The programmable-gain amplifier can comprise a differential voltage-to-current converter, a current mirror pair, and programmable output gain stages. The Sallen-Key filter and at least one branch in the programmable-gain amplifier can comprise transistors arranged in identical circuit configurations.
Implantable cardioverter defibrillators using high power amplifiers with impedance tracking lowpass filters
An apparatus has advanced amplifier Classes and low pass filter technologies for using software generated ascending or level waveforms that are effective when applying cardiac defibrillation and cardioversion waveforms which significantly reduce damage to the heart muscle. The apparatus comprises a waveform energy control system for delivering software generated waveforms comprising differentially driven Class D and Class B amplifier sections, wherein the Class D amplifier section produces Phase 1 ascending waveforms and has a programmable lowpass filter (LPF) and wherein the Class B amplifier section delivers hard-switched Phase 2 waveforms.
EFFICIENT ASCENDING WAVEFORM CARDIOVERTER DEFIBRILLATORS WITH HYBRID CLASS DB AMPLIFIERS HAVING PROGRAMMABLE LOWPASS FILTERS
An apparatus has advanced amplifier Classes and low pass filter technologies for using software generated ascending or level waveforms that are effective when applying cardiac defibrillation and cardioversion waveforms which significantly reduce damage to the heart muscle. The apparatus comprises a waveform energy control system for delivering software generated waveforms comprising differentially driven Class D and Class B amplifier sections, wherein the Class D amplifier section produces Phase 1 ascending waveforms and has a programmable lowpass filter (LPF) and wherein the Class B amplifier section delivers hard-switched Phase 2 waveforms.
Circuit and method for memory operation
A memory device including a plurality of memory units; at least one geometric mean operator coupled to at least two of the plurality of memory units; and a memory state reader coupled to the at least one geometric mean operator to read a memory state of the plurality of memory units.
CIRCUIT AND METHOD FOR MEMORY OPERATION
A memory device including a plurality of memory units; at least one geometric mean operator coupled to at least two of the plurality of memory units; and a memory state reader coupled to the at least one geometric mean operator to read a memory state of the plurality of memory units.
INTEGRATED COUPLED RESONATOR FILTERING
A coupled resonator filter including a first parallel resonator including a first capacitance connected in parallel with a first inductance. The filter includes a second parallel resonator including a second capacitance connected in parallel with a second inductance and a third parallel resonator including a third capacitance connected in parallel with a third inductance. Magnetic coupling between the first inductance and the second inductance, between the second inductance and the third inductance, and between the first inductance the third inductance occurs in accordance with first, second and third coupling factors, respectively. A frequency response of the coupled resonator filter includes a notch when values of the first coupling factor, the second coupling factor and the third coupling factor satisfy predetermined conditions.
SYSTEM AND METHOD FOR INTEGRATED FILTERING AND AMPLIFICATION
A coupled resonator filter including a first parallel resonator including a first capacitance connected in parallel with a first inductance. The filter includes a second parallel resonator including a second capacitance connected in parallel with a second inductance and a third parallel resonator including a third capacitance connected in parallel with a third inductance. Magnetic coupling between the first inductance and the second inductance, between the second inductance and the third inductance, and between the first inductance the third inductance occurs in accordance with first, second and third coupling factors, respectively. A frequency response of the coupled resonator filter includes a notch when values of the first coupling factor, the second coupling factor and the third coupling factor satisfy predetermined conditions.
SYSTEM AND METHOD FOR COUPLED RESONATOR FILTERING
A coupled resonator filter including a first parallel resonator including a first capacitance connected in parallel with a first inductance. The filter includes a second parallel resonator including a second capacitance connected in parallel with a second inductance and a third parallel resonator including a third capacitance connected in parallel with a third inductance. Magnetic coupling between the first inductance and the second inductance, between the second inductance and the third inductance, and between the first inductance the third inductance occurs in accordance with first, second and third coupling factors, respectively. A frequency response of the coupled resonator filter includes a notch when values of the first coupling factor, the second coupling factor and the third coupling factor satisfy predetermined conditions.