H03H17/0266

RESOURCE CONSERVING WEIGHTED OVERLAP-ADD CHANNELIZER
20200274524 · 2020-08-27 · ·

Systems and methods are provided for channelizing. A first stage can provide a WOLA filter bank that can apply a single multiplier resource to perform window weighting for multiple WOLA filter banks. The first stage can remove mixer-based post FFT adjustment and provide equal functionality with a particular modification of tuning mixers at inputs of second stage FIR paths. The first stage can include a variable decimation, using a particular implementation of variable sample block size.

Transmitter, receiver and a method for digital multiple sub-band processing

Highly efficient digital domain sub-band based receivers and transmitters.

Method for reduction of aliasing introduced by spectral envelope adjustment in real-valued filterbanks

The present invention proposes a new method for improving the performance of a real-valued filterbank based spectral envelope adjuster. By adaptively locking the gain values for adjacent channels dependent on the sign of the channels, as defined in the application, reduced aliasing is achieved. Furthermore, the grouping of the channels during gain-calculation, gives an improved energy estimate of the real valued subband signals in the filterbank.

DIGITAL SIGNAL CONDITIONER SYSTEM
20200169278 · 2020-05-28 ·

One example includes a digital signal conditioner (DSC) system. A sample selector bank receives a digital sample block of an input signal that is provided at a supported input oversampling factor and selects a subset of samples from the digital sample block based on a selection signal. A tap weights selector bank generates a set of tap weights based on the selection signal. A filter bank receives the subset of the samples from each of the sample selectors and a respective set of tap weights. Each filter provides a weighted sample associated with the respective subset of samples and the respective set of tap weights. A reformattor receives the weighted sample from each of the filters and provides a filtered sample block including the weighted sample from a subset of the filters at an output oversampling factor for each supported input oversampling factor based on a selected supported resampling ratio.

TRANSMITTER, RECEIVER AND A METHOD FOR DIGITAL MULTIPLE SUB-BAND PROCESSING
20200092146 · 2020-03-19 ·

Highly efficient digital domain sub-band based receivers and transmitters.

DIGITAL SIGNAL CONDITIONER SYSTEM
20200091947 · 2020-03-19 ·

One example includes a digital signal conditioner (DSC) system. A sample selector bank receives a digital sample block of an input signal that is provided at a supported input oversampling factor and selects a subset of samples from the digital sample block based on a selection signal. A tap weights selector bank generates a set of tap weights based on the selection signal. A filter bank receives the subset of the samples from each of the sample selectors and a respective set of tap weights. Each filter provides a weighted sample associated with the respective subset of samples and the respective set of tap weights. A reformattor receives the weighted sample from each of the filters and provides a filtered sample block including the weighted sample from a subset of the filters at an output oversampling factor for each supported input oversampling factor based on a selected supported resampling ratio.

METHOD AND SYSTEM FOR IMPLEMENTING A MODAL PROCESSOR
20200090637 · 2020-03-19 ·

The implementation of modal processors, which involve the parallel combination resonant filters, may be costly for applications such as artificial reverberation that can require thousands of modes. In one embodiment, the input signal is decomposed into a plurality of subbands, the outputs of which are downsampled. In each downsampled band, resonant filters are applied at the downsampled sampling rate, and their output is upsampled and filtered to form the band output.

Digital signal conditioner system
10587294 · 2020-03-10 · ·

One example includes a digital signal conditioner (DSC) system. A sample selector bank receives a digital sample block of an input signal that is provided at a supported input oversampling factor and selects a subset of samples from the digital sample block based on a selection signal. A tap weights selector bank generates a set of tap weights based on the selection signal. A filter bank receives the subset of the samples from each of the sample selectors and a respective set of tap weights. Each filter provides a weighted sample associated with the respective subset of samples and the respective set of tap weights. A reformattor receives the weighted sample from each of the filters and provides a filtered sample block including the weighted sample from a subset of the filters at an output oversampling factor for each supported input oversampling factor based on a selected supported resampling ratio.

Digital Filterbank for Spectral Envelope Adjustment
20200066292 · 2020-02-27 · ·

An apparatus and method are disclosed for processing an audio signal. The apparatus includes an input interface, a digital filterbank having an analysis part and a synthesis part, a first phase shifter, a spectral envelope adjuster, a second phase shifter, and an output interface. The first phase shifter and the second phase shifter reduce a complexity of the digital filterbank, which includes both analysis and synthesis filters that are complex-exponential modulated versions of a prototype filter.

Pulse code modulation passband filter and method for obtaining multiple filter passbands
20200067493 · 2020-02-27 ·

A 1st frequency reduction circuit of a filter of the invention downsamples the sampling rate of a signal source to a predetermined value to obtain a 1st PCM stream, a 1st frequency raising circuit raises the sampling rate of the 1st PCM stream to be the same as that of the signal source, a 1st delay circuit delays a stream of the signal source, such that its phase is the same as that of the 1st PCM stream, a 1st adder subtracts the frequency raised 1st PCM steam from the delayed stream of the signal source to obtain a passband 1, a j-th frequency reduction circuit downsamples the sampling rate of a (j1)-th PCM stream to a predetermined value to obtain a j-th PCM stream, wherein 2jn, a j-th frequency raising circuit raises the sampling rate of the j-th PCM stream to be the same as that of the (j1)-th PCM stream, a j-th delay circuit delays the (j1)-th PCM stream, such that its phase is the same as that of the j-th PCM stream, a j-th adder subtracts the frequency raised j-th PCM stream from the delayed (j1)-th PCM stream to obtain a passband j, and when j=n, the j-th PCM stream is a passband n+1.