A receiver circuit may include a first stage and a second stage. The first stage may include a first inverter circuit to generate a first signal based on an input signal and a second inverter circuit to generate a second signal based on the input signal. The second stage may determine a logic state of the input signal by combining the first signal generated by the first inverter circuit and the second signal generated by the second inverter circuit.

A voltage pulse generator comprising: circuitry controllable to generate a voltage pulse at an output of the circuitry; and an interruptor that monitors voltage at the output during a transition edge of the voltage pulse and interrupts a voltage change associated with the transition edge if the monitored voltage differs from a predetermined reference voltage by a predetermined amount.

A receiver circuit may include a first stage and a second stage. The first stage may include a first inverter circuit to generate a first signal based on an input signal and a second inverter circuit to generate a second signal based on the input signal. The second stage may determine a logic state of the input signal by combining the first signal generated by the first inverter circuit and the second signal generated by the second inverter circuit.

A Schmitt trigger voltage comparator circuit is provided including a voltage reference input, a current source having a first voltage controlled current source connected to the voltage reference input and a second voltage controlled current source connected to a signal input for converting the signal input to a input current and the voltage reference input to a reference current, a current mirror having an input connected to the output of the first voltage controlled current source configured and arranged to invert the direction of the first current and an output of the current mirror connected to the output of the second voltage controlled current source, and a sequence controller for generating digital signals to control a first plurality of switches and a second plurality of switches. The first plurality of switches control the first and second voltage controlled current sources and the second plurality of switches control the current mirror.

A random number generator circuit includes a noise source capable of providing a noise signal that varies randomly; and a circuit for extracting the noise signal including an edge detector configured to produce from the noise signal an analogue signal including voltage pulses, each voltage pulse corresponding to a rising or falling edge of the noise signal, and an analogue-to-digital converter configured to generate a random bit sequence from the analogue signal.

An input signal having a logic low level at a first voltage and a logic high level at a second voltage is received by a Schmitt trigger. A voltage generator outputs a reference voltage generated from a third voltage that is higher than the second voltage. A first transistor coupled between the third voltage and a power supply node of the Schmitt trigger is biased by the reference voltage to apply a fourth voltage to the power supply node of the Schmitt trigger that is dependent on the reference voltage. The reference voltage has a value which causes the fourth voltage to be less than or equal to the second voltage. A second transistor coupled between the input signal and the input of the Schmitt trigger circuit is also biased by the reference voltage to control the logic high level voltage of the input signal at the Schmitt trigger.

A sensing circuit includes: a comparison circuit for comparing an input signal to a corresponding limit threshold; and a control circuit for periodically selecting the limit threshold and sampling a comparison result to execute an interval determination step, thus determining an interval of the input signal. The interval determination step includes steps S100 and S200. Step S100: when the input signal is higher than an ascending upper limit threshold for consecutive plural times, assigning a higher adjacent interval as a following interval; when the input signal is lower than a descending lower limit threshold for consecutive plural times, assigning a lower adjacent interval as a following interval; and executing the interval determination step corresponding to the following interval. Step S200: When no adjacent interval is assigned as the following interval, generating an interval output signal corresponding to the interval and entering the corresponding step S100.

A comparison control circuit is adapted to analog-to-digital converters and low-dropout regulators. The comparison control circuit includes a comparator, a Schmitt trigger, a capacitor set and a logic circuit. The comparator is configured to output a comparison signal according to a first input signal and a second input signal, wherein the comparison signal is a first high voltage potential or a first low voltage potential. The Schmitt trigger is configured to output a trigger signal according to the comparison signal and a voltage potential range, wherein the voltage potential range is in a range from the first low voltage potential to the first high voltage potential. The capacitor set is configured to adjust the second input signal when being controlled. The logic circuit is configured to control the capacitor set according to the trigger signal to correspondingly adjust the second input signal.

This disclosure relates to a power supply detection circuit, including: a first input stage field effect transistor; an inverter stage; and a feedback stage field effect transistor. The inverter stage includes a complimentary pair of transistors that includes an NMOS transistor and a PMOS transistor configured and arranged such that gate lengths of the PMOS and NMOS transistors are different. The disclosure also relates to an integrated circuit including a power supply detection circuit.

An input buffer circuit includes a tracking circuit that produces a tracking signal and an inverter including a cascade of low voltage switching devices coupled to an output of the tracking circuit. The tracking signal follows a first signal during a first time period and a second signal during a second time period. The tracking circuit is configured to reduce an input high voltage/input low voltage (VIH/VIL) spread.