An apparatus includes a first transistor including a first gate, a first drain and a first source. A second transistor includes a second gate and a second source, the second gate is coupled to a first current source configured to generate a linear current ramp, the second source is coupled to the first gate and a second current source configured to generate a constant current through the second transistor determined by a sampled voltage between the first gate and the first source. A third transistor includes a third gate and a third source, the third gate is coupled to the first drain, and the third source is coupled to an inductive load, wherein the third transistor is configured to source a load current to the inductive load in response to an integration of the linear current ramp. A first capacitor is coupled between the third source and the second gate.

Apparatuses and methods for reducing vertical fixed pattern noise in imaging systems are disclosed herein. An example apparatus may include an analog dithering circuit coupled to randomly add an offset voltage to a first reference voltage in response to a random binary signal during an analog to digital conversion operation, and a ramp generator circuit coupled to receive the first reference voltage, and provide a second reference voltage in response, wherein the randomly added offset voltage to the first reference is also present in the second reference voltage.

A relaxation oscillator 2 comprises: a comparator 4 comprising: a differential pair of transistors 140, 142, 144. 40, 42, 44; a static current source 32; and a dynamic current source 32; and at least one energy storage component 8, 14;
wherein the comparator 4 is arranged to provide an output signal which triggers the charging or discharging of the energy storage component 8, the dynamic current source 32 being enabled prior to the charging or discharging being triggered and disabled after a predetermined time.

A relaxation oscillator 2 comprises: a comparator 4 comprising: a differential pair of transistors 140, 142, 144. 40, 42, 44; a static current source 32; and a dynamic current source 32; and at least one energy storage component 8, 14;
wherein the comparator 4 is arranged to provide an output signal which triggers the charging or discharging of the energy storage component 8, the dynamic current source 32 being enabled prior to the charging or discharging being triggered and disabled after a predetermined time.

A ramp generator includes a current generator, a current mirror, and a first capacitor. The current generator has an input for receiving a clock signal, and an output for providing a current proportional to a frequency of the clock signal using a first transistor having first and second current electrodes and a control electrode, an amplifier that establishes a reference voltage on the second current electrode of the first transistor, and a variable resistor coupled between the second current electrode of the second transistor and ground whose resistance is set according to the frequency of the clock signal. The current mirror has an input coupled to the first terminal of the first transistor, and a second terminal. The first capacitor has a first terminal coupled to the output of the current mirror and providing a ramp signal, and a second terminal coupled to the first power supply voltage terminal.

A ramp generator includes a current generator, a current mirror, and a first capacitor. The current generator has an input for receiving a clock signal, and an output for providing a current proportional to a frequency of the clock signal using a first transistor having first and second current electrodes and a control electrode, an amplifier that establishes a reference voltage on the second current electrode of the first transistor, and a variable resistor coupled between the second current electrode of the second transistor and ground whose resistance is set according to the frequency of the clock signal. The current mirror has an input coupled to the first terminal of the first transistor, and a second terminal. The first capacitor has a first terminal coupled to the output of the current mirror and providing a ramp signal, and a second terminal coupled to the first power supply voltage terminal.

In accordance with an embodiment, a method includes receiving an enable signal. After the enable signal is asserted, it is determined whether a soft-start capacitor is electrically connected to an input of a ramp generator circuit while keeping an output of the ramp generator circuit low. If the soft-start capacitor is electrically connected to the input of the ramp generator circuit, a first current is injected into the input of the ramp generator circuit to generate a first voltage ramp at the output of the ramp generator circuit. If the soft-start capacitor is not electrically connected to the input of the ramp generator circuit, a second current is injected to the input of the ramp generator circuit to generate a second voltage ramp at the output of the ramp generator circuit. The second current is smaller than the first current.

In accordance with an embodiment, a method includes receiving an enable signal. After the enable signal is asserted, it is determined whether a soft-start capacitor is electrically connected to an input of a ramp generator circuit while keeping an output of the ramp generator circuit low. If the soft-start capacitor is electrically connected to the input of the ramp generator circuit, a first current is injected into the input of the ramp generator circuit to generate a first voltage ramp at the output of the ramp generator circuit. If the soft-start capacitor is not electrically connected to the input of the ramp generator circuit, a second current is injected to the input of the ramp generator circuit to generate a second voltage ramp at the output of the ramp generator circuit. The second current is smaller than the first current.

A read-out circuit of an image sensor includes a ramp signal generator, a bias voltage generator and a conversion circuit. The ramp signal generates a ramp signal that linearly varies at a constant slope. The bias voltage generator generates a bias voltage based on a power supply voltage having a first noise component. The conversion circuit generates a reference voltage based on the bias voltage and the ramp signal, and performs an analog-to-digital conversion on an analog signal from a pixel to generate a digital signal corresponding to the analog signal. The analog signal has second noise component. The bias voltage generator adjusts an alternating current component included in the bias voltage such that a magnitude of a third noise component added to the reference voltage is substantially the same as a magnitude of the second noise component.

An oscillation circuit includes: a periodic signal generator which generates a periodic signal whose frequency varies; and a clock generator which generates a clock signal having a frequency commensurate with the frequency of the periodic signal.