A device includes a sensor and an oscillator. The sensor provides a temperature-sensitive voltage. The oscillator includes a digital delay cell and an adjustment device. The adjustment device, based on the temperature-sensitive voltage, adjusts a delay of the digital delay cell, wherein the digital delay cell produces, based on the adjusted delay, a signal at an oscillation frequency.

A circuit device includes a comparator and a flag signal generation circuit. The comparator includes a first voltage-time conversion circuit to which at least a first input signal is input and which outputs a first time information signal, a second voltage-time conversion circuit to which at least a second input signal is input and which outputs a second time information signal, and a determination circuit that determines magnitude relation of the first input signal and the second input signal, based on the first time information signal and the second time information signal. The flag signal generation circuit generates a flag signal indicating that a voltage difference between the first input signal and the second input signal is a predetermined voltage or less, based on the first time information signal and the second time information signal.

A circuit device includes a comparator and a flag signal generation circuit. The comparator includes a first voltage-time conversion circuit to which at least a first input signal is input and which outputs a first time information signal, a second voltage-time conversion circuit to which at least a second input signal is input and which outputs a second time information signal, and a determination circuit that determines magnitude relation of the first input signal and the second input signal, based on the first time information signal and the second time information signal. The flag signal generation circuit generates a flag signal indicating that a voltage difference between the first input signal and the second input signal is a predetermined voltage or less, based on the first time information signal and the second time information signal.

A circuit device includes a comparator and a flag signal generation circuit. The comparator includes a first voltage-time conversion circuit to which at least a first input signal is input and which outputs a first time information signal, a second voltage-time conversion circuit to which at least a second input signal is input and which outputs a second time information signal, and a determination circuit that determines magnitude relation of the first input signal and the second input signal, based on the first time information signal and the second time information signal. The flag signal generation circuit generates a flag signal indicating that a voltage difference between the first input signal and the second input signal is a predetermined voltage or less, based on the first time information signal and the second time information signal.

A circuit device includes a comparator and a flag signal generation circuit. The comparator includes a first voltage-time conversion circuit to which at least a first input signal is input and which outputs a first time information signal, a second voltage-time conversion circuit to which at least a second input signal is input and which outputs a second time information signal, and a determination circuit that determines magnitude relation of the first input signal and the second input signal, based on the first time information signal and the second time information signal. The flag signal generation circuit generates a flag signal indicating that a voltage difference between the first input signal and the second input signal is a predetermined voltage or less, based on the first time information signal and the second time information signal.

A delay cell includes first through fifth inversion circuits. The first inversion circuit inverts an input signal, and an output electrode of the first inversion circuit is coupled to a first node. The second inversion circuit is turned on in response to a control signal, and inverts the input signal when turned on. An output electrode of the second inversion circuit is coupled to the first node. The third inversion circuit inverts a signal at the first node, and an output electrode of the third inversion circuit is coupled to a second node. The fourth inversion circuit is turned on in response to the control signal, and inverts the signal at the first node when turned on. An output electrode of the fourth inversion circuit is coupled to the second node. The fifth inversion circuit inverts a signal at the second node to generate an output signal.

A delay cell includes first through fifth inversion circuits. The first inversion circuit inverts an input signal, and an output electrode of the first inversion circuit is coupled to a first node. The second inversion circuit is turned on in response to a control signal, and inverts the input signal when turned on. An output electrode of the second inversion circuit is coupled to the first node. The third inversion circuit inverts a signal at the first node, and an output electrode of the third inversion circuit is coupled to a second node. The fourth inversion circuit is turned on in response to the control signal, and inverts the signal at the first node when turned on. An output electrode of the fourth inversion circuit is coupled to the second node. The fifth inversion circuit inverts a signal at the second node to generate an output signal.