A bi-directional voltage converter of a smart card includes switching elements connected between an input node and an output node and a start-up transistors whose channel width over channel length is smaller than a channel width over channel length of the switching element. The bi-directional voltage converter stores a driving voltage applied to an output node in a storage capacitor during a booting operation and provides the voltage stored in the storage capacitor to an input node. The bi-directional voltage converter may boost another driving voltage at the input node step-wisely and may perform bi-directional voltage converting with reduced occupied area and high efficiency.

An output driving circuit may include a pull-up-pull-down driver connected to a pad, a level shifter operating based on a first power voltage and a second power voltage that is greater than the first power voltage, level shifting a data signal to generate a first control signal, and applying the first control signal to the pull-up-pull-down driver, and a driver control logic operating based on the first power voltage, generating a second control signal based on the data signal, and applying the second control signal to the pull-up-pull-down driver.

A gate driver includes: a timing determination unit configured to measure an on-time of a switching element and configured to determine, based on the on-time, a certain timing during a turn-off period of the switching element as an intermediate timing; and a driving condition changing unit configured to change a gate driving condition of the switching element at the intermediate timing determined by the timing determination unit.

A power supply circuit and an apparatus includes: a first switching transistor, a second switching transistor, a third switching transistor, a fourth switching transistor, a first capacitor, and a second capacitor. In this power supply circuit, one terminal of the first capacitor is connected to one terminal of the second capacitor, the other terminal of the first capacitor is separately connected to a first electrode of the first switching transistor and a first electrode of the second switching transistor, a second electrode of the first switching transistor is connected to a second electrode of the third switching transistor, a second electrode of the second switching transistor is connected to a second electrode of the fourth switching transistor, a third electrode of the first switching transistor is connected to an output node, and a third electrode of the second switching transistor is grounded.

A device for driving a control terminal of a transistor includes an input terminal, a transformer including an input winding and an output winding, the input winding being coupled to the input terminal, an n-stage buffer circuit configured to generate a drive signal for the control terminal of the transistor, the n-stage buffer circuit being coupled to a first end of the output winding, and a positive feedback path coupled to an output of a stage of the n-stage buffer circuit to provide a DC offset to an input of the n-stage buffer circuit.

A resonant gate driver 200A includes an H-bridge circuit and a resonant inductor integrated on a semiconductor substrate. A first leg of the H-bridge circuit includes a first high-side transistor, a first output node, and a first low-side transistor such that they are arranged side-by-side in a first direction (x direction) in a first region defined along a first side. The second leg of the H-bridge circuit includes a second high-side transistor, a second output node, and a second low-side transistor such that they are arranged side-by-side in a first direction (x direction) in a second region defined along a second side. A resonant inductor is a parasitic inductance that occurs in a coupling means that electrically couples the first output node and the second output node.

A bootstrapping circuit for a semiconductor switch is provided. The bootstrapping circuit includes a capacitor, a first node for coupling to an input node of the semiconductor switch, and a second node for coupling to a control node of the semiconductor switch. Further, the bootstrapping circuit includes a switch circuit configured to selectively couple the capacitor to a charge source while the semiconductor switch is open and to selectively close a conductive path between the first node and the second node for closing the semiconductor switch. The conductive path includes the capacitor. The bootstrapping circuit additionally includes charge injection circuitry configured to inject charge into the conductive path before, while or after the conductive path is closed by the switch circuit.

Devices having one primary transistor, or a plurality of primary transistors in parallel, protect electrical circuits from overcurrent conditions. Optionally, the devices have only two terminals and require no auxiliary power to operate. In those devices, the voltage drop across the device provides the electrical energy to power the device. A third or fourth terminal can appear in further devices, allowing additional overcurrent and overvoltage monitoring opportunities. Autocatalytic voltage conversion allows certain devices to rapidly limit or block nascent overcurrents.

Proposed is a drive circuit including: a driving NMOS transistor having a source set to a reference potential and a driving PMOS transistor having a source set to a first potential, the driving NMOS transistor and the driving PMOS transistor having a mutually common drain connected to a load; a first bipolar transistor configured to control on/off of the driving PMOS transistor; a first switching element that causes conduction or non-conduction between a gate and the source of the driving NMOS transistor; and a second switching element that causes conduction or non-conduction between a gate and the source of the driving PMOS transistor.

An example circuit includes a plurality of light emitters connected in parallel between a first node and a second node. The circuit also includes a plurality of capacitors, with each capacitor corresponding to one of the light emitters, and a plurality of discharge-control switches, with each discharge-control switches corresponding to one of the capacitors. The circuit further includes a pulse-control switch connected to the plurality of light emitters. During a first period, the pulse-control switch restricts current flow, and each of the plurality of capacitors is charged via the first node. During a second period, one or more of the plurality of discharge-control switches allows current flow that discharges one or more corresponding capacitors. During a third period, the pulse-control switch allows current flow that discharges one or more undischarged capacitors of the plurality of capacitors through one or more corresponding light emitters.