An apparatus comprises an energy transfer device that operates one or more input switches of an input side of an electrical isolation device to transfer energy through the isolation device to an output side of the electrical isolation device for activating a switch. The apparatus comprises a voltage conversion device that converts the energy from an input voltage of the input side to an output voltage to control the switch when the energy transfer is active. The apparatus comprises a passive turn off device that passively deactivates the switch when the energy transfer is inactive. The passive turn off device is disabled from deactivating the switch when the energy transfer is active.

A switch device includes a first radio-frequency (RF) terminal, a second RF terminal, a first transistor, a second transistor, and a variable resistance element. The first transistor includes a first terminal coupled to the first RF terminal, a second terminal, and a control terminal coupled to a control signal terminal providing a control signal. The second transistor includes a first terminal coupled to the second terminal of the first transistor, a second terminal coupled to the second RF terminal, and a control terminal. The variable resistance element is coupled between the second terminal of the first transistor and a bias voltage terminal. When the first transistor and the second transistor are in a transient state, the variable resistance element provides a lower resistance. When the first transistor and the second transistor are in an ON state, the variable resistance element provides a higher resistance.

Sub-threshold current reduction circuit (SCRC) switches and related apparatuses and methods are disclosed. An apparatus includes a first set of SCRC switches and a second set of SCRC switches electrically connected between power supply lines and power reception lines. The first set of SCRC switches is configured to electrically connect the power supply lines to the power reception lines in the first operational mode and the second operational mode. The second set of SCRC switches is configured to electrically connect the power supply lines to the power reception lines in the first operational mode and electrically isolate the power supply lines from the power reception lines in the second operational mode. Activation of the first set of SCRC switches is staggered in time with activation of the second set of SCRC switches. The second set of SCRC switches is spaced among the first set of SCRC switches.

A bidirectional signal conversion circuit is configured to perform a signal conversion between a first port and a second port, and includes a switch, a first pull-up resistor, a second pull-up resistor, a first output-response enhancement circuit, and a second output-response enhancement circuit. The switch is coupled between the first port and the second port, and operates according to a bias. The first (second) pull-up resistor is coupled between the first (second) port and a high (low) voltage terminal having a high (low) voltage. The first (second) output-response enhancement circuit includes a first (second) alternative-current (AC) coupling circuit and a first (second) output-stage circuit. When the first (second) port and the second (first) port functions as an input port and an output port respectively, the first (second) output-response enhancement circuit is operable to accelerate the transient response of the output port.

An example circuit includes a plurality of light emitters connected in parallel between a first node and a second node. The circuit also includes a plurality of capacitors, with each capacitor corresponding to one of the light emitters, and a plurality of discharge-control switches, with each discharge-control switches corresponding to one of the capacitors. The circuit further includes a pulse-control switch connected to the plurality of light emitters. During a first period, the pulse-control switch restricts current flow, and each of the plurality of capacitors is charged via the first node. During a second period, one or more of the plurality of discharge-control switches allows current flow that discharges one or more corresponding capacitors. During a third period, the pulse-control switch allows current flow that discharges one or more undischarged capacitors of the plurality of capacitors through one or more corresponding light emitters.

The present disclosure relates to a field-effect transistor (FET) controlling apparatus and method for accurately, controlling an operation state of a FET by adaptively adjusting a voltage applied to the FET to correspond to a voltage of a source terminal of the FET. The voltage applied to the gate terminal of the FET may be adaptively controlled according to the voltage of the source terminal using a capacitor. Therefore, even when the source terminal is not connected to the ground but connected to an external load, there is an advantage that the operation state of the FET may be smoothly and accurately controlled. In addition, there is an advantage that a voltage within a certain range may be applied to the gate terminal of the FET.

Methods and devices to improve the switching speed of radio frequency FET switch stacks are disclosed. The described methods and devices are based on bypassing drain-sources resistors when the FET switch stack is transitioning from an ON to an OFF state. Several implementations of the disclosed teachings are also presented.

A radio frequency (RF) switch includes a switchable RF path including a plurality of transistors coupled in series; a gate bias network including a plurality of resistors, wherein the gate bias network is coupled to each of the plurality of transistors in the switchable RF path; and a bypass network including a first plurality of transistors coupled in parallel to each of the plurality of transistors in the switchable RF path and a second plurality of transistors coupled in parallel to each of the plurality of resistors in the gate bias network.

A high-speed multiplexor comprises a set of differential input pairs to receive and mix a set of differential input signals at a differential output node pair. The high-speed multiplexer further comprises an active inductive load pair driven by the input stage using the mixed set of differential input signals. Each active inductive load comprises a p-channel field effect transistor (pFET) device connected to one of the differential output node pairs and a resistor connected between a gate node and a drain node of the pFET device. The multiplexer further comprises a first cross-coupling capacitor connected between the gate node of a first inductive load and a second output node of the differential output node pair and a second cross-coupling capacitor connected between the gate node of a second inductive load and a first output node of the differential output node pair.

This invention introduces the negative feedback into the gate drive. It proposes a negative feedback active gate drive (NFAGD) for silicon carbide (SiC) and gallium nitride (GaN) semiconductor devices to fully utilize their potential of high switching-speed capability in a phase-leg configuration. An auxiliary P-channel MOSFET is introduced to construct a negative feedback control mechanism. Due to the negative feedback mechanism, the proposed drive can automatically attenuate the disturbance from the complementary device of the phase-leg. The negative feedback active gate drive (NFAGD) has a simple structure and easy to be realized using a push-pull drive circuit, a drive resistor, an auxiliary MOSFET and an auxiliary capacitor, without involving any additional logical circuits. Functionally, the negative feedback active gate drive (NFAGD) can automatically suppress the induced gate-source voltage and make the gate voltage of the MOSFET stable even during high-speed switching operation without sacrificing the switching speed of the MOSFET.