A squib driver circuit for deployment of an active safety restraint in a vehicle. The squib driver circuit may include a high side protection circuit. The high side protection circuit may include a comparator circuit to compare a voltage at a high side feed terminal to a reference voltage and activate a timer in response to the voltage at the high side feed terminal exceeding the reference voltage, the timer generating a disable signal to disable the high side driver after a predetermined period of time. The high side protection circuit may disable the high side driver after the short is detected and elapse of the predetermined period of time. The squib driver circuit may be formed on a single chip.

A circuit and method for gradually reducing a coil current during a shutdown period is disclosed. The circuit and method include a controller that is configured in a control loop with a current sensor that measures the current in the coil and a transistor that can be controller to limit the current in the coil. The open-loop gain of the controller is determined by a resistance of a variable feedback resistor, and the resistance of the variable feedback resistor is reduced during the shutdown period as the coil current becomes small. The reduction of the resistance maintains a suitable phase margin by lowering the open loop gain of the circuit for low coil currents. Thus, during shutdown, the circuit provides control accuracy for high coil currents and control stability for low coil currents.

To provide a semiconductor circuit capable of slightly generating inductance in two facing bus bars. Provided with a semiconductor circuit in which a collector-side bus bar 46 and an emitter-side bus bar 41 are arranged in parallel in a state of being isolated from each other and are fitted in a fixed manner to each other, and a inductance generation portion 411 is provided in one or both of the collector-side bus bar 46 and the emitter-side bus bar 41, the inductance generation portion 411 generating a difference in inductance between the collector-side bus bar 46 and the emitter-side bus bar 41.

A DC power supply system has first and second DC power distribution bus sections and a DC power switching assembly has a plurality of series connected power switching units and a current limiter. Each power switching unit has a first and second power switching unit terminal and two symmetrical power switching sub-units to control current flow between. Each sub-unit is electrically connected on one side to one of the first and second power switching unit terminals and on the other side to the other sub-unit. The power switching sub-units each have a semiconductor device and in parallel with the semiconductor device, a series connected diode and capacitor. A first terminal of the assembly is electrically coupled to the first bus section and the second terminal is electrically coupled to the second bus section. The voltage at one side of the power switching assembly is greater than or equal to 1 kV.

In accordance with an embodiment, at least one switching circuit includes a voltage clamping element, and a half-bridge with a high-side switch and a low side-switch, wherein the high-side switch and the low-side switch each comprise a control node and a load path, and wherein the load paths of the high-side switch and the low side switch are connected in series. The voltage clamping element is connected in parallel with the half-bridge such that a first overall inductance of first conductors connecting the high-side switch and the low-side switch and connecting the voltage clamping element with the half-bridge is less than 20 nH.

A high voltage switch comprising: a high voltage power supply providing power greater than about 5 kV; a control voltage power source; a plurality of switch modules arranged in series with respect to each other each of the plurality of switch modules configured to switch power from the high voltage power supply, and an output configured to output a pulsed output signal having a voltage greater than the rating of any switch of the plurality of switch modules, a pulse width less than 2 s, and at a pulse frequency greater than 10 kHz.

A DC power switching assembly includes a plurality of series connected power switching units. Each power switching unit has a first terminal of the unit and a second terminal of the unit, the terminals having the same polarity. A power switching sub-unit is electrically coupled between the first terminal and the second terminal of the unit to control current flow between the first terminal and the second terminal. The sub-unit has at least one semiconductor device, a current limiter and a pair of series connected diodes in parallel with the current limiter. The series connected diodes and current limiter are connected to one terminal of the semiconductor device; and a capacitor is connected to the other terminal of the semiconductor device.

According to the present invention, a semiconductor device includes a first semiconductor device, a second semiconductor device, an AC output terminal, a first shunt resistor connected to the first semiconductor device at one end thereof and the AC output terminal at the other end thereof, a second shunt resistor connected to the second semiconductor device at one end thereof and the AC output terminal at the other end thereof, a first wiring connecting the one end of the first shunt resistor and the one end of the second shunt resistor, a second wiring connecting the other end of the first shunt resistor and the other end of the second shunt resistor and a first sense resistor circuit including a first sense resistor and a second sense resistor connected in series between the one end of the first shunt resistor and the one end of the second shunt resistor.

A high voltage switch comprising: a high voltage power supply providing power greater than about 5 kV; a control voltage power source; a plurality of switch modules arranged in series with respect to each other each of the plurality of switch modules configured to switch power from the high voltage power supply, and an output configured to output a pulsed output signal having a voltage greater than the rating of any switch of the plurality of switch modules, a pulse width less than 2 s, and at a pulse frequency greater than 10 kHz.

A semiconductor device includes a plurality of first transistor cells and a plurality of second transistor cells that are electrically connected in parallel between a collector electrode and an emitter electrode. A gate voltage on each of the plurality of first transistor cells is controlled by a first gate interconnection. A gate voltage on each of the plurality of second transistor cells is controlled by a second gate interconnection. A drive circuit is configured to: apply an ON-voltage of the semiconductor device to each of the first and second gate interconnections when the semiconductor device is turned on; and after a lapse of a predetermined time period since start of application of the ON-voltage, apply an OFF-voltage of the semiconductor device to the second gate interconnection and apply an ON-voltage to the first gate interconnection.