A switch circuit of an embodiment includes a radio-frequency switch and a level shifter circuit. The radio-frequency switch, which includes a first switch group and a second switch group each including a plurality of switches, switches transmission/reception of a radio-frequency signal. The level shifter circuit outputs a first signal for controlling ON/OFF of each switch of the first switch group and a second signal for controlling ON/OFF of each switch of the second switch group.

A positive-logic FET switch stack that does not require a negative bias voltage, exhibits high isolation and low insertion/mismatch loss, and may withstand high RF voltages. Embodiments include a FET stack comprising series-coupled positive-logic FETs (i.e., FETs not requiring a negative voltage supply to turn OFF), series-coupled on at least one end by an “end-cap” FET of a type that turns OFF when its V.sub.GS is zero volts. The one or more end-cap FETs provide a selectable capacitive DC blocking function or a resistive signal path. Embodiments include a stack of FETs of only the zero V.sub.GS type, or a mix of positive-logic and zero V.sub.GS type FETs with end-cap FETs of the zero V.sub.GS type. Some embodiments withstand high RF voltages by including combinations of series or parallel coupled resistor ladders for the FET gate resistors, drain-source resistors, body charge control resistors, and one or more AC coupling modules.

The present invention discloses a switch on/off circuit for a battery management system, including a driving signal input terminal, a start-up driving signal output terminal, a power supply terminal, a power signal extraction circuit, a trigger circuit, and a switch. The driving signal input terminal is connected to the start-up driving signal output terminal by the switch. The power signal extraction circuit is connected to the power supply terminal, and is configured to output a control signal based on a power signal inputted from the power supply terminal. The trigger circuit is electrically connected to the power signal extraction circuit. The trigger circuit is configured to control the switch on or off according to a transition of the control signal. The switch on/off circuit for a battery management system provided in the present invention, by using the trigger circuit to receive the switch on/off signal outputted by the power signal extraction circuit, realizes the unified management of switch on and off signals. The switch on/off circuit is easy to expand and has high reusability.

The present disclosure relates to switching drivers for driving a transducer. A switching driver (202) has supply nodes for receiving supply voltages (VSH, VSL) defining at least one input voltage and an output node (104). A controller (205) controls operation of the first switching driver to generate a drive signal for the transducer at the output node (104), based on an input signal (Sin). A first capacitor (201a) is connected between first and second capacitor nodes (104, 204a) and a second capacitor (201b) is connected between the second capacitor node (204a) and a third capacitor node (204b). A network of switches (203) selectively connects any of the driver output node, the second capacitor node and the third capacitor node to either of a respective pair of said supply nodes, with the first capacitor node connected to the first driver output node.

A semiconductor device includes m power transistors (m is an integer of 2 or more) coupled in parallel each of which has a sense source terminal, a Kelvin terminal and a source terminal, a first average circuit that connects the first resistor and the second resistor in order between the sense source terminal and the Kelvin terminal and generates first to fourth average voltages and an arithmetic circuit that measures a first current value flowing through the sense source terminal from the first and second average voltages, measures a second current value flowing through the sense source terminal from the third and fourth average voltages and measures a current value flowing through the source terminal from the first to fourth average voltages and the first and second current values.

Embodiments provided herein generally include apparatus, e.g., plasma processing systems, and methods for the plasma processing of a substrate in a processing chamber. Some embodiments are directed to a waveform generator. The waveform generator generally includes a first voltage stage having: a first voltage source; a first switch; and a second switch, where a first terminal of the first voltage source is coupled to a first terminal of the first switch, and where a second terminal of the first voltage source is coupled to a first terminal of the second switch. The waveform generator also includes a current stage coupled to a common node between second terminals of the first switch and the second switch, the current stage having a current source and a third switch coupled to the current source.

A power semiconductor device includes a semiconductor substrate and a plurality of transistor cells formed in the semiconductor substrate and electrically connected in parallel to form a power transistor. Each transistor cell includes a gate structure including a gate electrode and a gate dielectric stack separating the gate electrode from the semiconductor substrate. The gate dielectric stack includes a ferroelectric insulator and a first dielectric insulator. The first dielectric insulator has a relative permittivity greater than that of silicon dioxide. A driver device for switching the power transistor and a corresponding method of operating the power transistor are also described.

Inter-integrated circuit input circuitry includes a pull-up current circuit and an input circuit. The input circuit includes an output inverter, an input inverter, and a pull-up circuit. The pull-up circuit is coupled to an input of the input inverter, and includes a pull-up transistor and a cascode transistor. The pull-up transistor is coupled to the input of the input inverter. The cascode transistor is coupled to the pull-up current circuit and the pull-up transistor, and configured to isolate the pull-up transistor from capacitance of a conductor coupled to the pull-up current circuit and the input circuit.

A fault detection circuit includes a short circuit comparison circuit which has a first input connected to the source of the second NFET, a second input, and an output. The circuit includes an over-current comparison circuit which has a first input connected to the source of the second NFET, a second input, and an output. The circuit includes a voltage divider circuit which has a first terminal connected to first input of the short circuit comparison circuit, a second terminal connected to the first input of the over-current comparison circuit, and a third terminal connected to a ground terminal. The circuit includes a delay circuit which has an input connected to the output of the over-current comparison circuit and has an output.

According to the present disclosure, a bidirectional switch circuit includes a first semiconductor device including a first backside electrode electrically connected to a first pattern and a first upper surface electrode, a second semiconductor device including a second backside electrode electrically connected to a second pattern and a second upper surface electrode, a first diode including a first cathode electrode electrically connected to the first pattern and a first anode electrode, a second diode including a second cathode electrode electrically connected to the first pattern and a second anode electrode, first wiring electrically connecting the first upper surface electrode and the second anode electrode and second wiring electrically connecting the second upper surface electrode and the first anode electrode, wherein the first upper surface electrode, the second upper surface electrode, the first anode electrode and the second anode electrode are electrically connected to each other.