H03K17/689

SWITCH CONTROL DEVICE
20210384902 · 2021-12-09 ·

The present description concerns a method of controlling at least one switch (TH), including: the reception of signals (S3-i) having between one another at least one phase shift representative of a desired state of said at least one switch; the obtaining, from said signals, of a value (S1) representative of the desired state; and the application of the representative value to said at least one switch.

Circuit and method for controlling charge injection in radio frequency switches

A circuit and method for controlling charge injection in a circuit are disclosed. In one embodiment, the circuit and method are employed in a semiconductor-on-insulator (SOI) Radio Frequency (RF) switch. In one embodiment, an SOI RF switch comprises a plurality of switching transistors coupled in series, referred to as “stacked” transistors, and implemented as a monolithic integrated circuit on an SOI substrate. Charge injection control elements are coupled to receive injected charge from resistively-isolated nodes located between the switching transistors, and to convey the injected charge to at least one node that is not resistively-isolated. In one embodiment, the charge injection control elements comprise resistors. In another embodiment, the charge injection control elements comprise transistors. A method for controlling charge injection in a switch circuit is disclosed whereby injected charge is generated at resistively-isolated nodes between series coupled switching transistors, and the injected charge is conveyed to at least one node of the switch circuit that is not resistively-isolated.

Circuit and method for controlling charge injection in radio frequency switches

A circuit and method for controlling charge injection in a circuit are disclosed. In one embodiment, the circuit and method are employed in a semiconductor-on-insulator (SOI) Radio Frequency (RF) switch. In one embodiment, an SOI RF switch comprises a plurality of switching transistors coupled in series, referred to as “stacked” transistors, and implemented as a monolithic integrated circuit on an SOI substrate. Charge injection control elements are coupled to receive injected charge from resistively-isolated nodes located between the switching transistors, and to convey the injected charge to at least one node that is not resistively-isolated. In one embodiment, the charge injection control elements comprise resistors. In another embodiment, the charge injection control elements comprise transistors. A method for controlling charge injection in a switch circuit is disclosed whereby injected charge is generated at resistively-isolated nodes between series coupled switching transistors, and the injected charge is conveyed to at least one node of the switch circuit that is not resistively-isolated.

Interlock circuit

An interlock circuit comprises a plurality of semiconductor switching units electrically connected or connectable in series in a supply line, a plurality of control units electrically connected to the plurality of semiconductor switching units, and a trigger unit electrically connected to the plurality of control circuits. Each control unit activates or deactivates a corresponding semiconductor switching unit in response to trigger signal received from the trigger unit.

DRIVE CIRCUIT
20220190824 · 2022-06-16 · ·

A drive circuit has a control signal input for receiving a first control signal at a first circuit input, an optocoupler which is connected to the control signal input and which is adapted to generate a galvanically decoupled second control signal in accordance with the first control signal, an output circuit for controlling at least one circuit output terminal of the drive circuit in accordance with a third control signal, and an electronic control circuit comprising an energy supply, an input for receiving the second control signal, and an output for outputting the third control signal in accordance with the second control signal received at the input.

DRIVE CIRCUIT
20220190824 · 2022-06-16 · ·

A drive circuit has a control signal input for receiving a first control signal at a first circuit input, an optocoupler which is connected to the control signal input and which is adapted to generate a galvanically decoupled second control signal in accordance with the first control signal, an output circuit for controlling at least one circuit output terminal of the drive circuit in accordance with a third control signal, and an electronic control circuit comprising an energy supply, an input for receiving the second control signal, and an output for outputting the third control signal in accordance with the second control signal received at the input.

MANAGEMENT OF MULTIPLE SWITCHING-SYNCHRONIZED MEASUREMENTS USING COMBINED PRIORITIZED MEASUREMENT AND ROUND-ROBIN SEQUENCE MEASUREMENT
20220190818 · 2022-06-16 ·

A method for operating a gate driver system includes measuring a first parameter according to a first priority schedule synchronously to a first edge of a switching signal generated by a gate driver integrated circuit and having a variable duty cycle. The method includes after measuring the first parameter of the gate driver system and prior to a second edge of the switching signal, measuring at least a second parameter of the gate driver system according to a first round-robin schedule synchronously to the first edge of the switching signal.

CIRCUIT AND METHOD FOR CONTROLLING CHARGE INJECTION IN RADIO FREQUENCY SWITCHES

A circuit and method for controlling charge injection in a circuit are disclosed. In one embodiment, the circuit and method are employed in a semiconductor-on-insulator (SOI) Radio Frequency (RF) switch. In one embodiment, an SOI RF switch comprises a plurality of switching transistors coupled in series, referred to as “stacked” transistors, and implemented as a monolithic integrated circuit on an SOI substrate. Charge injection control elements are coupled to receive injected charge from resistively-isolated nodes located between the switching transistors, and to convey the injected charge to at least one node that is not resistively-isolated. In one embodiment, the charge injection control elements comprise resistors. In another embodiment, the charge injection control elements comprise transistors. A method for controlling charge injection in a switch circuit is disclosed whereby injected charge is generated at resistively-isolated nodes between series coupled switching transistors, and the injected charge is conveyed to at least one node of the switch circuit that is not resistively-isolated.

CIRCUIT AND METHOD FOR CONTROLLING CHARGE INJECTION IN RADIO FREQUENCY SWITCHES

A circuit and method for controlling charge injection in a circuit are disclosed. In one embodiment, the circuit and method are employed in a semiconductor-on-insulator (SOI) Radio Frequency (RF) switch. In one embodiment, an SOI RF switch comprises a plurality of switching transistors coupled in series, referred to as “stacked” transistors, and implemented as a monolithic integrated circuit on an SOI substrate. Charge injection control elements are coupled to receive injected charge from resistively-isolated nodes located between the switching transistors, and to convey the injected charge to at least one node that is not resistively-isolated. In one embodiment, the charge injection control elements comprise resistors. In another embodiment, the charge injection control elements comprise transistors. A method for controlling charge injection in a switch circuit is disclosed whereby injected charge is generated at resistively-isolated nodes between series coupled switching transistors, and the injected charge is conveyed to at least one node of the switch circuit that is not resistively-isolated.

Gate driver bootstrap circuits and related methods

Gate driver bootstrap circuits and related methods are disclosed. An example gate driver stage includes a first terminal and a second terminal, the first terminal to be coupled to a capacitor, the capacitor and the second terminal to be coupled to a gate terminal of a power transistor, a gate driver coupled to the first terminal and the second terminal, and a bootstrap circuit coupled to the first terminal, the second terminal, and the gate driver, the bootstrap circuit including a control stage circuit having an output and a first transistor having a first gate terminal and a first current terminal, the first gate terminal coupled to the output, the first current terminal coupled to the first terminal.