An NMOS switch driving circuit and a power supply device are provided. The NMOS switch driving circuit includes a power-supply unit, a switch unit, a power conversion unit, and a driving unit. The power-supply unit is configured to output a first voltage. The switch unit is electrically coupled between the power-supply unit and a first interface and configured to establish or disconnect an electrical coupling between the power-supply unit and the first interface. The power conversion unit includes a port coupled to the power-supply unit and another port electrically coupled to the switch unit via the driving unit. The power conversion unit is configured to convert the first voltage into a constant driving voltage and output the driving voltage to the switch unit via the driving unit to drive the switch unit to be switched on, to establish the electrical coupling between the power-supply unit and the first interface.

An interlock system for signaling a nurse call patient station is disclosed. The interlock system may include a first terminal and a second terminal. The first and second terminals may be configured to be connected to corresponding terminals of a signaling loop of a nurse call patient station. The interlock system may further include a connection circuit. The connection circuit may be configured to electrically connect the first terminal to the second terminal. The interlock system may also include a control circuit in communication with, but isolated from, the connection circuit. The control circuit may include a microcontroller. The control circuit may be isolated from the connection circuit by an isolation circuit. The control circuit may be configured to operate the connection circuit to connect or disconnect the first terminal from the second terminal.

In one embodiment, an impedance matching network includes a variable reactance circuit providing a variable capacitance or inductance. The variable reactance circuit includes reactance components and corresponding switching circuits. Each of the switching circuits includes a diode and a driver circuit to switch the diode. The driver circuit includes first and second switches coupled in series. A first driver is coupled to the first switch, a second driver is coupled to the second switch, and a third driver is coupled to the first and second drivers. The third driver provides a first signal to the first driver, and a second signal to the second driver. In providing the signals, the third driver increases and decreases a duration of a dead time between (a) driving the first driver on and the second driver off, or (b) driving the second driver on and the first driver off.

A high voltage switch comprising: a high voltage power supply providing power greater than about 5 kV; a control voltage power source; a plurality of switch modules arranged in series with respect to each other each of the plurality of switch modules configured to switch power from the high voltage power supply, and an output configured to output a pulsed output signal having a voltage greater than the rating of any switch of the plurality of switch modules, a pulse width less than 2 s, and at a pulse frequency greater than 10 kHz.

A high voltage switch comprising: a high voltage power supply providing power greater than about 5 kV; a control voltage power source; a plurality of switch modules arranged in series with respect to each other each of the plurality of switch modules configured to switch power from the high voltage power supply, and an output configured to output a pulsed output signal having a voltage greater than the rating of any switch of the plurality of switch modules, a pulse width less than 2 s, and at a pulse frequency greater than 10 kHz.

In one embodiment, an impedance matching network includes an electronically variable reactance element (EVRE) comprising discrete reactance elements and corresponding switches. The switches are configured to switch in and out the discrete reactance elements to alter a total reactance provided by the EVRE. A monitoring circuit is operably coupled to the EVRE. For each discrete reactance element, the monitoring circuit monitors a value related to the discrete reactance element or its corresponding switch. Upon determining the monitored value exceeds a predetermined amount, the monitoring circuit the discrete reactance element of the EVRE from switching in or out.

A digital input circuit adopts a first state when an input signal is below a lower threshold value and adopts a second state when the input signal is above an upper threshold value. The digital input circuit comprises first and second subcircuits that exhibit a non-ideal current output behavior at least in the second state, and each comprises a current stabilizing element with a driving circuit and a voltage stabilizing element. The first and second subcircuits are configured such that, at least in a portion of the second state, an electric current flowing through the first subcircuit's voltage stabilizing element consists substantially of a stabilized current of the second subcircuit, and an electric current that flows through the second subcircuit's voltage stabilizing element consists substantially of a stabilized current of the first subcircuit, such that the non-ideal current output behavior of the first and second subcircuits compensate for each other.

An interlock system for signaling a nurse call patient station is disclosed. The interlock system may include a first terminal and a second terminal. The first and second terminals may be configured to be connected to corresponding terminals of a signaling loop of a nurse call patient station. The interlock system may further include a connection circuit. The connection circuit may be configured to electrically connect the first terminal to the second terminal. The interlock system may also include a control circuit in communication with, but isolated from, the connection circuit. The control circuit may include a microcontroller. The control circuit may be isolated from the connection circuit by an isolation circuit. The control circuit may be configured to operate the connection circuit to connect or disconnect the first terminal from the second terminal.

The present disclosure discloses a gate drive output stage circuit, a gate driving unit, and a drive method. The gate drive output stage circuit includes: a first control sub-circuit configured to transmit a start signal of a compensation driving terminal to a first node; a second control sub-circuit configured to transmit a first clock signal of a first clock terminal to a control node when the first node is at an effective level; a first output sub-circuit configured to transmit a second clock signal of a second clock terminal to a first output terminal when the control node is at an effective level; and a second output sub-circuit configured to transmit a first power supply voltage signal of a first power supply voltage terminal to a second output terminal when the control node is at the effective level.

A phase loss detection device, a compressor including the same, and a phase loss detection method are disclosed. The phase loss detection device may include a signal converting circuit and a processor. The signal converting circuit is configured to convert voltage signals corresponding to respective phases of multiphase alternating current (AC) power monitored from a motor. The processor is configured to receive the converted voltage signals from the signal converting circuit, and configured to calculate, based on the converted voltage signals, one or more phase angles between the respective voltage signals. The processor is configured to determine that phase loss occurs if any one or more of the calculated phase angles deviate from a nominal value of a corresponding phase angle of the multiphase AC power by a value higher than a predetermined threshold. The phase loss detection can be performed in a convenient, effective and reliable way.