Methods and digital circuits provide frequency correction to frequency synthesizers. Dual switched-capacitor voltage detectors connected to an input signal periodically sample the voltage of the input signal, and then determine a fundamental frequency of the input signal from the output of the dual switched-capacitor voltage detectors. The sample period of the dual switched-capacitor voltage detectors is proportional to a time period between a previous pair of voltage peaks detected in the input signal, thereby eliminating harmonic components in the original signal which might otherwise cause errors in frequency estimation without causing unwanted sluggishness in the transient response of the frequency detection process. The time period between the previous pair of detected voltage peaks is used to create a decay signal that initiates a capacitor decay time for each voltage detector. Two additional digital methods of extracting the fundamental frequency as well as an envelope of an analog audio signal are also described, one utilizing a sliding sample rate, and the other utilizing a fixed sample rate.

Provided herein are gap detection and compensation schemes for timing alignment systems. In certain embodiments, a timing alignment system includes a detector that generates one or more loop control signals based on comparing a reference clock signal to a feedback clock signal, a loop filter having a loop voltage that is adjusted based on the one or more loop control signals, and a gap detection and compensation circuit that processes the one or more loop control signals to detect a gap in at least one of the reference clock signal or the feedback clock signal. In response to detecting the gap, the gap detection and compensation circuit modifies the one or more loop control signals to provide an adjustment to the loop voltage.

Provided herein are gap detection and compensation schemes for timing alignment systems. In certain embodiments, a timing alignment system includes a detector that generates one or more loop control signals based on comparing a reference clock signal to a feedback clock signal, a loop filter having a loop voltage that is adjusted based on the one or more loop control signals, and a gap detection and compensation circuit that processes the one or more loop control signals to detect a gap in at least one of the reference clock signal or the feedback clock signal. In response to detecting the gap, the gap detection and compensation circuit modifies the one or more loop control signals to provide an adjustment to the loop voltage.

A phase locked loop circuit includes a phase comparator that compares phases of a reference signal through a first frequency divider and a local signal through a second frequency divider to output a phase comparison signal; a loop filter that smooths the phase comparison signal to output the control voltage signal; a controller that sets frequency division ratios of the first and the second frequency dividers; a free-running voltage generator that generates a free-running voltage signal of the voltage control oscillator; a measurement circuit that measures a voltage of the control voltage signal; a storage circuit that stores therein the voltage of the control voltage signal; and a low-pass filter that transmits, to the voltage control oscillator, a corrected free-running voltage signal based on a free-running voltage correction value calculated by the free-running voltage generator based on the control voltage signal before the frequency division ratios are changed.

A phase locked loop circuit includes a phase comparator that compares phases of a reference signal through a first frequency divider and a local signal through a second frequency divider to output a phase comparison signal; a loop filter that smooths the phase comparison signal to output the control voltage signal; a controller that sets frequency division ratios of the first and the second frequency dividers; a free-running voltage generator that generates a free-running voltage signal of the voltage control oscillator; a measurement circuit that measures a voltage of the control voltage signal; a storage circuit that stores therein the voltage of the control voltage signal; and a low-pass filter that transmits, to the voltage control oscillator, a corrected free-running voltage signal based on a free-running voltage correction value calculated by the free-running voltage generator based on the control voltage signal before the frequency division ratios are changed.

A timing circuit can include: a low-precision clock source configured to generate a low-precision clock signal; a high-precision clock source configured to intermittently generate a high-precision clock signal; and a cycle conversion circuit configured to count the pulses of the high-precision clock signal and the low-precision clock signal during a same period, and to obtain a conversion cycle according to count results and a rated cycle of the high-precision clock signal.

A timing circuit can include: a low-precision clock source configured to generate a low-precision clock signal; a high-precision clock source configured to intermittently generate a high-precision clock signal; and a cycle conversion circuit configured to count the pulses of the high-precision clock signal and the low-precision clock signal during a same period, and to obtain a conversion cycle according to count results and a rated cycle of the high-precision clock signal.

An electronic device may include a transceiver with mixer circuitry that up-converts or down-converts signals based on a voltage-controlled oscillator (VCO) signal. The transceiver circuitry may include first, second, third, and fourth VCOs. Each VCO may include a VCO core that receives a control voltage and an inductor coupled to the VCO core. Fixed linear capacitors may be coupled between the VCO cores. A switching network may be coupled between the VCOs. Control circuitry may place the VCO circuitry in one of four different operating modes and may switch between the operating modes to selectively control current direction in each of the inductors. The VCO circuitry may generate the VCO signal within a respective frequency range in each of the operating modes. The VCO circuitry may exhibit a relatively wide frequency range across all of the operating modes while introducing minimal phase noise to the system.

An electronic device may include a transceiver with mixer circuitry that up-converts or down-converts signals based on a voltage-controlled oscillator (VCO) signal. The transceiver circuitry may include first, second, third, and fourth VCOs. Each VCO may include a VCO core that receives a control voltage and an inductor coupled to the VCO core. Fixed linear capacitors may be coupled between the VCO cores. A switching network may be coupled between the VCOs. Control circuitry may place the VCO circuitry in one of four different operating modes and may switch between the operating modes to selectively control current direction in each of the inductors. The VCO circuitry may generate the VCO signal within a respective frequency range in each of the operating modes. The VCO circuitry may exhibit a relatively wide frequency range across all of the operating modes while introducing minimal phase noise to the system.

An electronic device may include a transceiver with mixer circuitry that up-converts or down-converts signals based on a voltage-controlled oscillator (VCO) signal. The transceiver circuitry may include first, second, third, and fourth VCOs. Each VCO may include a VCO core that receives a control voltage and an inductor coupled to the VCO core. Fixed linear capacitors may be coupled between the VCO cores. A switching network may be coupled between the VCOs. Control circuitry may place the VCO circuitry in one of four different operating modes and may switch between the operating modes to selectively control current direction in each of the inductors. The VCO circuitry may generate the VCO signal within a respective frequency range in each of the operating modes. The VCO circuitry may exhibit a relatively wide frequency range across all of the operating modes while introducing minimal phase noise to the system.