A method and a circuit for measuring an absolute voltage signal, such that the circuit comprises: an A/D convertor, and a controller adapted for: a) obtaining a first digital reference value for a first reference signal having a positive temperature coefficient; b) obtaining a second digital reference value for a second reference signal having a negative temperature coefficient; c) obtaining a raw digital signal value for the signal to be measured, while applying a same reference voltage for step a) to c); and d) calculating the absolute voltage value in the digital domain using a mathematical function of the first and second digital reference value, and the raw digital signal value.

This disclosure relates to data converters for electronic systems. An example system includes a primary analog to digital converter (ADC) circuit, a slope calculation circuit, a digital phase lock loop (DPLL) circuit, a sampling error circuit, and a summing circuit. The primary ADC circuit samples an input signal and produces a digital output signal representative of the input signal. The slope calculation circuit generates a digital slope signal representative of slope of the input signal, and the DPLL circuit provides a sampling clock signal to the primary ADC circuit. The sampling error circuit generates a sampling error signal representative of sampling error by the primary ADC circuit using the digital slope signal and the sampling clock signal. The summing circuit receives the sampling error signal and the digital output signal of the primary ADC circuit and generates an adjusted digital output signal representative of the input signal.

This disclosure relates to data converters for electronic systems. An example system includes a primary analog to digital converter (ADC) circuit, a slope calculation circuit, a digital phase lock loop (DPLL) circuit, a sampling error circuit, and a summing circuit. The primary ADC circuit samples an input signal and produces a digital output signal representative of the input signal. The slope calculation circuit generates a digital slope signal representative of slope of the input signal, and the DPLL circuit provides a sampling clock signal to the primary ADC circuit. The sampling error circuit generates a sampling error signal representative of sampling error by the primary ADC circuit using the digital slope signal and the sampling clock signal. The summing circuit receives the sampling error signal and the digital output signal of the primary ADC circuit and generates an adjusted digital output signal representative of the input signal.

A semiconductor device includes an AD conversion unit that performs AD conversion on an input signal based on a reference voltage to be supplied, a reference voltage detection unit that detects the reference voltage supplied to the AD conversion unit, and a control unit that corrects a result of the AD conversion by the AD conversion unit in accordance with the reference voltage detected by the reference voltage detection unit. Thereby, AD conversion can be performed accurately even when a reference voltage varies.

Aspects of the disclosure are directed to compensating for errors in in an analog-to-digital converter circuit (ADC). As may be implemented in accordance with one or more embodiments, an apparatus and/or method involves an ADC that converts an analog signal into a digital signal using an output from a digital-to-analog converter circuit (DAC). A compensation circuit generates a compensation output by, for respective signal portions provided to the DAC, generating a feedback signal based on an incompatibility between the conversion of the signal portions into an analog signal and the value of the signal portions provided to the DAC. A compensation output is generated based on the signal input to the DAC with a gain applied thereto, based on the feedback signal. Hereby, the digital inputs provided to the DACs are non-randomized.

A semiconductor device includes an AD conversion unit that performs AD conversion on an input signal based on a reference voltage to be supplied, a reference voltage detection unit that detects the reference voltage supplied to the AD conversion unit, and a control unit that corrects a result of the AD conversion by the AD conversion unit in accordance with the reference voltage detected by the reference voltage detection unit. Thereby, AD conversion can be performed accurately even when a reference voltage varies.