Provided is a signal processing system including: an adaptive decimation filter apparatus which has a decimation filter which outputs an output signal obtained by down-sampling an input signal, and an aliasing noise detection unit which detects a magnitude of aliasing noise, which is folded back to a frequency lower than a Nyquist frequency in the output signal of the decimation filter by the down-sampling; and a signal processing apparatus which has a filter control unit which adjusts an order of the decimation filter on the basis of the magnitude of the aliasing noise, and an adaptive filter unit which performs filter processing on the output signal of the decimation filter.

Example embodiments relate to sensor readout systems and sensor readout methods. One example sensor readout system includes a signal generator configured to generate a biasing signal. The sensor readout system also includes a first chopper configured to modulate the biasing signal using a chopping signal with a chopping frequency f.sub.chop to generate a modulated biasing signal. Additionally, the sensor readout system includes a Wheatstone bridge circuit that includes resistive branches. At least one of the resistive branches includes an impedance-based sensor. The Wheatstone bridge circuit is configured to receive the modulated biasing signal and to generate a sensing signal based on the modulated biasing signal. Further, the sensor readout system includes a second chopper configured to modulate the sensing signal using the chopping signal with the chopping frequency f.sub.chop to generate a modulated sensing signal.

An electronic apparatus includes: a processor; a first electronic circuit that outputs a pulse width modulation signal; a low-pass filter circuit that outputs a voltage based on the pulse width modulation signal; a second electronic circuit that outputs an analog signal by using the output voltage of the low-pass filter circuit; and a third electronic circuit that converts the analog signal into a digital signal, and the processor sets a frequency of the pulse width modulation signal to a frequency at which a noise component included in the digital signal is reduced in relation to a sampling frequency of the third electronic circuit.