It is an object of the present technology to provide an image sensor capable of reducing crosstalk in an AD conversion unit. The image sensor includes: capacitors in an even-numbered column region; and a capacitor in an odd-numbered column region disposed facing the capacitors in the even-numbered column region with different areas.

A current cancellation circuit, a heart rate detection device and a wearable device. The current cancellation circuit includes: a current-voltage conversion circuit and a SAR ADC, where the SAR ADC includes a DAC, an SAR logic circuit and a comparator; the current-voltage conversion circuit is configured to receive an analog current output by the DAC and an interference current output by a photoelectric sensor, calculate a difference between the analog current and the interference current, and output an analog voltage; the comparator is configured to receive the analog voltage output by the current-voltage conversion circuit, and output a comparison result according to the analog voltage; and the DAC is configured to output the analog current according to a digital signal corresponding to the comparison result that is output by the SAR logic circuit, and the analog current is used to cancel the interference current output by the photoelectric sensor.

Circuit including a first port to couple to a first device; a second port to couple to a second device; a first channel having an input coupled to first port and an output coupled to second port, the first channel to re-drive a signal and output re-driven signal; a second channel having an input coupled to second port and an output coupled to first port, the second channel to re-drive a signal and output re-driven signal; and a controller to: enable first channel and disable second channel responsive to detecting a signal edge at first port; enable second channel and disable first channel responsive to detecting a signal edge at second port; sample impedance at first port if signal received at first port is de-asserted while first channel is enabled; and sample impedance at second port if signal received at second port is de-asserted while second channel is enabled.

Switching techniques for fast voltage settling in image sensors are described. In one embodiment, an image sensor includes a plurality of lateral overflow integrating capacitor (LOFIC) pixels arranged in rows and columns of a pixel array. The plurality of pixels includes an active pixel configured for exposure to light, and a dummy pixel at least partially protected from exposure to light. A common bitline (BL) is couplable to the active pixel and the dummy pixel. A comparator (OA1) is coupled to the bitline. The comparator is configured to receive a pixel voltage (Vx) from the active pixel on one input and a ramp voltage (Vy) on another input. Charge accumulated by the active pixel is determined at least in part by an intersection between the ramp voltage and the pixel voltage.

A photodetection device according to the present disclosure includes: a first pixel that is configured to generate a first pixel signal; a reference signal generator that is configured to generate a reference signal; and a first converter that includes a first buffer circuit and a first comparison circuit and is configured to convert the first pixel signal into a digital code, the first buffer circuit configured to output a first signal corresponding to the reference signal from an output terminal, and the first comparison circuit configured to perform a comparison operation on the basis of the first pixel signal and the first signal.

Certain aspects of the present disclosure provide a digital-to-analog converter (DAC) system. The DAC system generally includes a plurality of current steering cells, each comprising a current source coupled to at least two current steering switches, wherein control inputs of the at least two current steering switches are coupled to an input path of the DAC system. The DAC system may also include a current source toggle circuit configured to selectively disable the current source of at least one of the plurality of current steering cells, and a feedforward path coupled between the input path and at least one control input of the current source toggle circuit.

Provided is an imaging apparatus in which a column signal processing system includes a successive approximation register analog-to-digital converter capable of operating at higher speed and with lower power consumption.

An electronic device of the present disclosure includes an imaging apparatus including a pixel array unit on which pixels including a photoelectric conversion element are arranged, a column amplifier unit that obtains a difference between a reset component and a signal component input from each of the pixels of the pixel array unit through a signal line and outputs the difference as a pixel signal, a capacitance unit that holds the pixel signal input from the column amplifier unit, and a successive approximation register analog-to-digital conversion unit that converts an analog signal input from the capacitance unit into a digital signal.

Provided is an image sensor including: a pixel section configured to include a plurality of pixels arranged therein; and an AD conversion unit configured to perform analog-to-digital (AD) conversion on a pixel signal on the basis of a result of comparison between a first voltage of a signal, which is obtained by adding, via capacitances, the pixel signal of the pixel and a reference signal that linearly changes in a direction opposite to the pixel signal, with a second voltage serving as a reference.

The application discloses a circuit, including: a positive-terminal p-type transistor; a negative-terminal p-type transistor; a positive-terminal n-type transistor, wherein the positive-terminal p-type transistor and the positive-terminal n-type transistor are cascoded between a first reference voltage and a second reference voltage; a negative-terminal n-type transistor, wherein the negative-terminal p-type transistor and the negative-terminal n-type transistor are cascoded between the first reference voltage and the second reference voltage; a first positive-terminal capacitor, a top plate of the first positive-terminal capacitor is coupled to a gate of the positive-terminal n-type transistor; a first negative-terminal capacitor, a top plate of the first negative-terminal capacitor is coupled to a gate of the negative-terminal n-type transistor; a first control circuit, arranged to generate a first control signal to bottom plates of the first positive-terminal capacitor and the first negative-terminal capacitor according to the positive-terminal output signal, the negative-terminal output signal and the target common mode voltage.

Provided is an image sensor including: a pixel section configured to include a plurality of pixels arranged therein; and an AD conversion unit configured to perform analog-to-digital (AD) conversion on a pixel signal on the basis of a result of comparison between a first voltage of a signal, which is obtained by adding, via capacitances, the pixel signal of the pixel and a reference signal that linearly changes in a direction opposite to the pixel signal, with a second voltage serving as a reference.