An imaging element according to a first aspect includes: a successive approximation resistor type analog-digital converter that converts an analog signal output from a pixel including a photoelectric conversion part into a digital signal, in which the successive approximation resistor type analog-digital converter has a preamplifier having a band limiting function. An imaging element according to a second aspect includes a DAC in which the successive approximation resistor type analog-digital converter uses a capacitance element to convert a digital value after AD conversion to an analog value, and sets the analog value to a comparison reference for comparison with an analog input voltage. Then, the DAC includes one of lower-bit capacitance elements including a plurality of capacitance elements, and after performing AD conversion for all bits, each of the plurality of capacitance elements is selectively applied with at least a first reference voltage to a fourth reference voltage, so that re-AD conversion is performed for lower bits.

An over/under voltage protection circuit includes a voltage input terminal, a digital-to analog converter, a comparator, and a control circuit. The comparator includes a first input coupled to an output of the digital-to-analog converter, and a second input coupled to the voltage input terminal. The control circuit includes an output coupled to an input of the digital-to-analog converter, and an input coupled to an output of the comparator. The control circuit is configured to set the digital-to-analog converter to generate an overvoltage fault threshold responsive to the output of the comparator indicating that voltage of a signal at the voltage input terminal exceeds a threshold currently generated by the digital-to-analog converter.

The systems and methods discussed herein utilized a wireless or wired transceiver having a transmitter and a receiver. The transceiver is configured to reduce distortion contributions associated with echo cancelling. The transmitter provides a replica signal and a transmit signal. The replica signal and the transmit signal can be provided using a common switch.

A digital-to-analog converter for generating an analog output voltage in response to a digital value comprising a plurality of bits, the converter including: (i) a first switched resistor network having a first configuration and for converting a first input differential signal into a first analog output in response to a first set of bits in the plurality of bits; and (ii) a second switched resistor network, coupled to the first switched resistor network, having a second configuration, differing from the first configuration, and for converting a second input differential signal into a second analog output in response to a second set of bits in the plurality of bits.

Digital-to-analog conversion circuit, digital-to-analog conversion method, display apparatus are disclosed. Digital-to-analog conversion circuit may comprise: voltage dividing sub-circuit comprising M voltage dividing signal terminals; decoding sub-circuit comprising M input and output terminals, M input terminals electrically coupled to first to M.sup.th voltage dividing signal terminals of voltage dividing sub-circuit respectively, decoding sub-circuit configured to receive digital signal and select one of M input terminals to be electrically connected with output terminal according to digital signal; amplification sub-circuit comprising input and output terminals, input terminal of amplification sub-circuit electrically coupled to output terminal of decoding sub-circuit, amplification sub-circuit configured to amplify signal at its input terminal, output analog gray-scale voltage at output terminal, voltage dividing signal at voltage dividing signal terminal is less than or equal to ½ of maximum load voltage at output terminal of digital-to-analog conversion circuit, amplification sub-circuit has amplification coefficient N greater than or equal to 2.

A power supply drive circuit includes a primary-side power supply drive circuit and a secondary-side power supply circuit. The primary-side power supply drive circuit has a digital-to-analog converter for executing soft-start control of a primary-side power supply circuit with a predetermined step amount. The primary-side power supply circuit generates a predetermined primary-side voltage from a power supply voltage. The secondary-side power supply drive circuit drives a secondary-side power supply circuit that lowers the predetermined primary-side voltage to generate a predetermined secondary-side voltage. The digital-to-analog converter further sets a step amount for an output of the digital-to-analog converter to be smaller than the predetermined step amount based on a condition that the output is in a vicinity of the predetermined secondary side voltage.

A successive approximation ADC includes: a comparator generating a judge signal related to an input analog and a reference signals; a SAR successively generating a register signal including a first and a second bit signals based on the judge signal and generating an AD conversion value of the input analog signal; a thermometer decoder switching different thermometer code conversion rules and converting the first bit signal to thermometer codes corresponding to the different thermometer code conversion rules in one AD conversion cycle; a first and a second DA converters respectively converting the thermometer codes to a first analog signal and the second bit signal to a second analog signal; an average value calculator averaging the AD conversion values by the thermometer codes. Two of the different thermometer codes have values that a high-order bit and a low-order bit groups by dividing total bits of the thermometer code equally are exchanged.

A voltage ladder is used to generate reference voltages. The voltage ladder is used by multiple digital-to-analog converters (DACs). In particular, the voltage ladder is used by multiple pulse-width modulation (PWM) DACs. Having multiple DACs utilize a common voltage ladder for their reference voltages reduces mismatched output voltages between DACs. Having multiple DACs utilize the common voltage ladder helps ensure that the reference voltages used by different DACs are not affected by process, voltage, and/or temperature variations in the reference voltages that would occur when using different voltage ladders for each DAC.

An analog-to-digital conversion device and analog-to-digital conversion method thereof are provided. The analog-to-digital conversion device includes an analog circuit configured to output an analog input signal, and an analog-to-digital converter configured to receive the analog input signal and configured to outputting a digital output signal corresponding to the analog input signal with the use of first and second capacitor arrays, each of the first and second capacitor arrays including a first capacitor having a calibration capacitor connected thereto and a second capacitor having no calibration capacitor connected thereto, wherein the analog-to-digital converter is configured to calibrate the capacitance of the first capacitor by providing a first calibration voltage to the calibration capacitor and is configured to output the digital output signal corresponding to the analog input signal with the use of the calibrated capacitance of the first capacitor.

A security device includes a physical unclonable function (PUF) cell array including PUF cells connected with word lines and bit lines; first decoder circuitry connecting a first bit line connected to a target PUF cell with a first data line and a second bit line connected with a reference PUF cell to a second data line; a digital-to-analog converter (DAC) control circuit outputting first and second digital codes; a first DAC between a power supply voltage and the first data line, the first DAC generating a first analog output in response to the first digital code; a second DAC between the power supply voltage and the second data line, the second DAC generating a second analog output in response to the second digital code; and a sense amplifier comparing the first analog output and the second analog output and outputting a comparison result.