A delta-sigma modulator including force circuitry that receives an output digital signal and provides a forced digital signal with a predetermined force state based on a force control signal, a combiner that subtracts the forced digital signal from the output digital signal for providing a digital error signal, and force correction circuitry that converts the digital error signal into one or more analog error correction signals applied to corresponding inputs of loop filter circuitry. The digital error signal and the force control signal may each be used to develop corresponding analog feedback signals used to adjust an analog input signal. The digital error signal may also be converted to one or more correction signals applied to corresponding inputs of the loop filter circuitry to correct the output digital signal. The digital error signal may also be used by a digital noise cancellation filter to further correct the output digital signal.

An idle tone dispersion device outputs a frequency delta-sigma modulation signal obtained by using either one of a reference signal and a measured signal to perform frequency delta-sigma modulation of the other and dispersing an idle tone. The idle tone dispersion device includes n (n is any natural number equal to or larger than 2) frequency delta-sigma modulation sections and an adder configured to add up output signals of the n frequency delta-sigma modulation sections and output the frequency delta-sigma modulation signal. Each of the n frequency delta-sigma modulation sections uses either one of the reference signal and the measured signal to perform the frequency delta-sigma modulation of the other. At least one of the reference signal and the measured signal includes jitter including a frequency component higher than a frequency of an idle tone of an output signal of the frequency delta-sigma modulation section.

A delta-sigma modulator including force circuitry that receives an output digital signal and provides a forced digital signal with a predetermined force state based on a force control signal, a combiner that subtracts the forced digital signal from the output digital signal for providing a digital error signal, and force correction circuitry that converts the digital error signal into one or more analog error correction signals applied to corresponding inputs of loop filter circuitry. The digital error signal and the force control signal may each be used to develop corresponding analog feedback signals used to adjust an analog input signal. The digital error signal may also be converted to one or more correction signals applied to corresponding inputs of the loop filter circuitry to correct the output digital signal. The digital error signal may also be used by a digital noise cancellation filter to further correct the output digital signal.

An idle tone dispersion device outputs a frequency delta-sigma modulation signal obtained by using either one of a reference signal and a measured signal to perform frequency delta-sigma modulation of the other and dispersing an idle tone. The idle tone dispersion device includes n (n is any natural number equal to or larger than 2) frequency delta-sigma modulation sections and an adder configured to add up output signals of the n frequency delta-sigma modulation sections and output the frequency delta-sigma modulation signal. Each of the n frequency delta-sigma modulation sections uses either one of the reference signal and the measured signal to perform the frequency delta-sigma modulation of the other. At least one of the reference signal and the measured signal includes jitter including a frequency component higher than a frequency of an idle tone of an output signal of the frequency delta-sigma modulation section.

Transition smoothing apparatus for reducing spurious input to a system under feedback control connected to a control loop. The apparatus includes a loop filter to integrate an error between an input signal applied to the loop filter and an output signal of the system under feedback control, an analog-to-digital converter to provide digitized integrated error values, a controller to generate output values supplied to the system under feedback control in response to the digitized integrated error values and in a start-up sequence to control a feedback digital-to-analog converter according to the digitized integrated error values to supply a first control signal to the loop filter and control the system under feedback control to generate a second control signal, and an alignment detector to detect phase alignment between the first control signal and the second control signal to control a smooth transition into closed loop operation of the control loop.

An analog to digital circuit that includes a feedback circuit with a return to open (RTO), digital to analog converter (DAC) that provides an analog signal that is indicative of an output of an ADC component of the ADC. During a data phase, the output of the DAC is provided to a combiner input through a resistive circuit. The combiner also receives an analog input signal at another input and provides a combined output signal to the ADC component. During a reset phase, the output of the DAC is provided to the combiner through a lower resistance bypass circuit to bypass the resistive circuit.

An analog to digital circuit that includes a feedback circuit with a return to open (RTO), digital to analog converter (DAC) that provides an analog signal that is indicative of an output of an ADC component of the ADC. During a data phase, the output of the DAC is provided to a combiner input through a resistive circuit. The combiner also receives an analog input signal at another input and provides a combined output signal to the ADC component. During a reset phase, the output of the DAC is provided to the combiner through a lower resistance bypass circuit to bypass the resistive circuit.