This application relates to time-encoding modulators (301,700) having a self-oscillating modulator module configured to receive an input signal and output a pulse-width modulated signal (S.sub.PWM) where the pulse-width modulated signal is synchronised to a first clock signal (CLK.sub.1). A hysteretic comparator module (302) located in a feedforward path is configured to generate the time encoded signal (S.sub.PWM) at a first node (304) based on the input signal (S.sub.IN) and a feedback signal (S.sub.FB). A feedback path is coupled to the first node to provide the feedback signal, which is either applied to an input of the hysteretic comparator module via a loop filter (701) in the feedback path or applied to the feedforward path prior to a loop filter (202) upstream of the hysteretic comparator module (302). The hysteretic comparator module (302) is configured such that any change in state of the time encoded signal at the first node is synchronised to the first clock signal (CLK.sub.1).

An apparatus for generating an output signal, may comprise a signal path having an analog signal path portion having an analog magnitude droop, a digital signal path portion having a digital magnitude droop, a digital-to-analog converter for converting the digital input signal into the analog signal, a first digital compensation filter that compensates for the analog magnitude droop, and a second digital compensation filter that compensates for the digital magnitude droop, such that the first digital compensation filter and the second digital compensation filter together compensate for magnitude droop of the signal path to ensure a substantially flat passband response of the signal path.

An apparatus may include a delta-sigma modulator for quantization noise shaping of a digital signal, a digital-to-analog converter configured to generate an analog signal from the digital signal, and an amplifier configured to amplify the analog signal and powered from a charge pump, wherein the charge pump is configured to operate at a switching frequency approximately equal to a zero of a modulator noise transfer function of the delta-sigma modulator, such that the impact of charge pump noise on a total harmonic distortion noise of the apparatus is minimized

An apparatus for generating an output signal, may comprise a signal path having an analog signal path portion having an analog magnitude droop, a digital signal path portion having a digital magnitude droop, a digital-to-analog converter for converting the digital input signal into the analog signal, a first digital compensation filter that compensates for the analog magnitude droop, and a second digital compensation filter that compensates for the digital magnitude droop, such that the first digital compensation filter and the second digital compensation filter together compensate for magnitude droop of the signal path to ensure a substantially flat passband response of the signal path.

An apparatus may include a delta-sigma modulator for quantization noise shaping of a digital signal, a digital-to-analog converter configured to generate an analog signal from the digital signal, and an amplifier configured to amplify the analog signal and powered from a charge pump, wherein the charge pump is configured to operate at a switching frequency approximately equal to a zero of a modulator noise transfer function of the delta-sigma modulator, such that the impact of charge pump noise on a total harmonic distortion noise of the apparatus is minimized

An apparatus may include a delta-sigma modulator for quantization noise shaping of a digital signal, a digital-to-analog converter configured to generate an analog signal from the digital signal, and an amplifier configured to amplify the analog signal and powered from a charge pump, wherein the charge pump is configured to operate at a switching frequency approximately equal to a zero of a modulator noise transfer function of the delta-sigma modulator, such that the impact of charge pump noise on a total harmonic distortion noise of the apparatus is minimized.

A device and method for sigma-delta modulation may include an input signal and a plurality of integrators. The output of the integrators and a data input may be input to an adder, the sum output to be input to a quantizer to generate a quantized output signal. A reset input to the first integrator may be asserted during a first sample of the quantized output signal to reduce the signal discontinuity at the input of the first integrator, which improves the stability of the sigma-delta modulator.

Provided are apparatuses and methods, in which a disturbed measurement variable is converted to a digital signal. The digital signal is then averaged over a number of sampling values which corresponds to a period of the disturbances.

A data processor is disclosed. The data processor includes a data processing module. The data processing modules includes an input for receiving an input signal, an output for providing a quantized output signal, a combining unit configured to combine a feedback signal from the output with the input signal and a quantizer configured to provide the quantized output signal based on the combined signal. The data processor further includes a correction module configured to receive the quantized output signal, generate a full-scale digital signal based on the quantized output signal, determine a metastability error in the full-scale digital signal and provide a compensated output signal based on the quantized output signal and the determined metastability error.

A data processor is disclosed. The data processor includes a data processing module. The data processing modules includes an input for receiving an input signal, an output for providing a quantized output signal, a combining unit configured to combine a feedback signal from the output with the input signal and a quantizer configured to provide the quantized output signal based on the combined signal. The data processor further includes a correction module configured to receive the quantized output signal, generate a full-scale digital signal based on the quantized output signal, determine a metastability error in the full-scale digital signal and provide a compensated output signal based on the quantized output signal and the determined metastability error.

An exemplary circuit includes a tracking circuit, a current estimator, a switch control logic, and a switching load circuit. The tracking circuit tracks a digital output signal of a delta-sigma modulator (DSM) and provides a tracking signal representing an average of the digital output signal during a time period. The current estimator determines an amount of loading to be applied to positive and negative reference voltages based on the tracking signal. The switching load circuit is coupled to positive and negative reference voltages of the DSM, the switching load circuit connects a selected amount of loading to the positive and negative reference voltages in response to a control signal to balance a reference load current applied to the DSM. The switch control logic provides the control signal to the switching load circuit based on the determined amount of loading to be applied to the positive and negative reference voltages.

A delta-sigma Analog-to-Digital Converter (ADC) (IC) which includes an input feed-forward path extending from an input to the ADC to a feed-forward summing circuit disposed between a loop filter and quantizer of the ADC, and a filter disposed in the feed-forward path as an apparatus for improving distortion performance in the delta-sigma ADC. The filter may be a low pass filter, for example, a Resistor-Capacitor (RC) circuit. The filter may have a cut-off frequency outside the ADC's passband. The filtering provided may be continuous-time filtering, even if the delta-sigma ADC is a discrete-time delta-sigma ADC.