H03M3/376

Adaptive analog to digital converter (ADC) multipath digital microphones
12301261 · 2025-05-13 · ·

Exemplary multipath digital microphone described herein can comprise exemplary embodiments of adaptive ADC range multipath digital microphones, which allow low power to be achieved for amplifiers or gain stages, as well as for exemplary adaptive ADCs in exemplary multipath digital microphone arrangements described herein, while still providing a high DR digital microphone systems. Further non-limiting embodiments can comprise an exemplary glitch removal component configured to minimize audible artifacts associated with the change in the gain of the exemplary adaptive ADCs.

Glitch-free zero-latency AGC for sigma delta modulator
12323166 · 2025-06-03 · ·

A system, comprising: a sigma-delta modulator using an integrator of a cascade-of-integrator feedback topology to perform operations is disclosed. The operations can comprise in response to receiving a gain value, applying the gain value to a group of feed-forward coefficients, determining a change in the gain value, and adjusting, during a clock cycle of a defined time period, a plurality of state variables of the sigma-delta modulator by multiplying each of the state variables by the scale factor that is a ratio of the gain value after determining the change in the gain value the gain value before determining the change in the gain value.

Inter-symbol interference compensation for analog-to-digital converter

A device may include a sigma-delta analog-to-digital converter (ADC) configured to convert an analog input signal to a digital signal that is a digital approximation of the analog input signal. A bitstream modifier is configured to receive the digital signal, output a first signal that is based on the digital signal at a first output terminal and output a first difference signal at a second output terminal that includes a first difference value between a first value of the digital signal and a second value of the digital signal. The second value is immediately prior to the first value in the digital signal. An error correction system is configured to receive the first signal, receive the first difference signal, use the first signal and the first difference signal to determine a correction value, and modify the digital signal to generate a corrected digital signal by applying the correction value.