Patent classifications
H03M3/398
PROGRAMMABLE RECEIVERS INCLUDING A DELTA-SIGMA MODULATOR
Various embodiments relate to an analog-to-digital converter (ADC). The ADC may include a first channel including a first delta-sigma loop filter and a second channel including a second delta-sigma loop filter. Each of the first delta-sigma loop filter and the second delta-sigma loop filter may include a first integrator and a quantizer having an input coupled to an output of the first integrator. Each of the first delta-sigma loop filter and the second delta-sigma loop filter may also include a first summing node having an output coupled to an input of the first integrator, and a feedforward path from an input of the delta-signal loop filter to a first input of the first summing node. Further, each of the first delta-sigma loop filter and the second delta-sigma loop filter may include a first feedback path from an output of the quantizer to a second input of the first summing node.
ANALOG-DIGITAL CONVERTER HAVING MULTIPLE FEEDBACK, AND COMMUNICATION DEVICE INCLUDING THE ANALOG-DIGITAL CONVERTER
An analog-digital converter has multiple feedback, and includes: a capacitor digital-analog converter including a plurality of switches driven by a digital code, and a plurality of capacitors respectively connected to the plurality of switches, wherein the capacitor digital-analog converter is configured to generate a residue voltage based on an analog input voltage and a voltage corresponding to the digital code; first and second feedback capacitors each storing the residue voltage; an integrator configured to generate an integral signal by integrating the residue voltage; first and second comparators respectively configured to generate first and second comparison signals from the integral signal; and a digital logic circuitry configured to receive the first and second comparison signals, and generate a digital output signal from the first and second comparison signals, the digital output signal corresponding to the digital code during a successive approximation register (SAR) analog-digital conversion interval, and the digital output signal corresponding to an average of first and second digital control signals during a delta sigma analog-digital conversion interval, wherein the first and second comparison signals are respectively fed back to the first and second feedback capacitors. The analog-digital converter may be included in various electronic devices, including communication devices.
Electronic Circuit for a Microphone and Microphone
An electronic circuit for a microphone and a microphone are disclosed. In an embodiment, the electronic circuit includes a sigma-delta modulator having a configurable resolution and a mode selector, wherein the sigma-delta modulator is selectively operable in at least two operation modes and the mode selector is configured to determine a desired operation mode dependent on an externally provided control signal and to select the resolution of the sigma-delta modulator according to the determined operation mode.
Method and apparatus for hybrid delta-sigma and Nyquist data converters
A wide bandwidth radio system designed to adapt to various global radio standards and, more particularly, to a radio receiver composed of a demodulator operative to work in a delta sigma mode and a Nyquist mode, and wherein a filter and feedback loop may utilized in response to the modulation mode of an RF signal.
NOISE-SHAPING SUCCESSIVE-APPROXIMATION-REGISTER ANALOG-TO-DIGITAL CONVERTER
Disclosed herein are systems and methods that describe a noise-shaping (NS) SAR architecture that can be simple, effective, and low power. In an aspect, a method includes the operation of receiving a first analog input; determining a first digital output based on the first analog input; obtaining a first quantization error for the first digital output; integrating the first quantization error; receiving a second analog input; and determining a second digital output based on the summation of the second analog input and the first integrated quantization error to perform noise-shaping.
Isolator system supporting multiple ADCs via a single isolator channel
In an isolation system, different analog to digital converters (ADCs) are provided on a first side of an isolation barrier. Outputs from the ADCs may be merged into a common data stream and communicated across the isolation barrier by a single isolation device. The ADCs may sample independent signals or may sample a common signal. When the ADCs sample a common signal, the system may monitor the input signal for fault conditions. During no fault operation, results of an analog-to-digital conversion may be communicated across an isolation barrier by an isolation device. During a fault condition, data representing the fault condition may replace the ADC data in communication across the isolation barrier. Fault conditions may be signaled by unique data patterns that can be distinguished from ADC data.