A scalable dynamic range analog-to-digital converter. In one instance, a method of scaling a dynamic range of an analog-to-digital converter is provided. The method includes operating the analog-to-digital converter at a first dynamic range. The method also includes receiving a radio frequency signal and detecting an on-channel signal level of the radio frequency signal. The method also includes when the on-channel signal level is above an on-channel threshold, operating the analog-to-digital converter at a second dynamic range. The method also includes when the on-channel signal level is below the on-channel threshold, operating the analog-to-digital converter at the first dynamic range.

A scalable dynamic range analog-to-digital converter. In one instance, a method of scaling a dynamic range of an analog-to-digital converter is provided. The method includes operating the analog-to-digital converter at a first dynamic range. The method also includes receiving a radio frequency signal and detecting an on-channel signal level of the radio frequency signal. The method also includes when the on-channel signal level is above an on-channel threshold, operating the analog-to-digital converter at a second dynamic range. The method also includes when the on-channel signal level is below the on-channel threshold, operating the analog-to-digital converter at the first dynamic range.

In accordance with embodiments of the present disclosure, a processing system comprising may include a plurality of processing paths and a filter. The plurality of processing paths may include a first processing path and a second processing path, wherein the first processing path is configured to generate a first digital signal based on an analog input signal and the second processing path is configured to generate a second digital signal based on the analog input signal. The filter may have a corner frequency and may be configured to generate a filtered digital output signal combining spectral components of the first digital signal lower than the corner frequency and spectral components of the second digital signal higher than the corner frequency to generate a filtered digital signal.

In accordance with embodiments of the present disclosure, a processing system comprising may include a plurality of processing paths and a filter. The plurality of processing paths may include a first processing path and a second processing path, wherein the first processing path is configured to generate a first digital signal based on an analog input signal and the second processing path is configured to generate a second digital signal based on the analog input signal. The filter may have a corner frequency and may be configured to generate a filtered digital output signal combining spectral components of the first digital signal lower than the corner frequency and spectral components of the second digital signal higher than the corner frequency to generate a filtered digital signal.

An analog-to-digital converter circuit usable for measuring a voltage having a large common-mode voltage includes two input voltage nodes, a voltage sensing circuit (that includes a sigma-delta modulator) that senses a voltage between the nodes, a digital filter that outputs a multi-bit digital value, and an input current cancellation circuit. The input current cancellation circuit supplies/draws cancellation currents to/from the nodes to compensate for currents drawn from/supplied to the nodes by the voltage sensing circuit. The input current cancellation circuit includes a digitally-programmable digital processing circuit and a current canceling circuit. In one example, the digital processing circuit includes a sigma-delta modulator that transforms a single-bit digital signal output by the voltage sensing circuit into a single-bit digital signal that drives the current canceling circuit. The transfer function of the current compensation loop is programmable and adjustable by loading digital trim values into the circuit.

In accordance with embodiments of the present disclosure, a processing system comprising may include a plurality of processing paths and a filter. The plurality of processing paths may include a first processing path and a second processing path, wherein the first processing path is configured to generate a first digital signal based on an analog input signal and the second processing path is configured to generate a second digital signal based on the analog input signal. The filter may have a corner frequency and may be configured to generate a filtered digital output signal combining spectral components of the first digital signal lower than the corner frequency and spectral components of the second digital signal higher than the corner frequency to generate a filtered digital signal.

A system, comprising: a sigma-delta modulator using an integrator of a cascade-of-integrator feedback topology to perform operations is disclosed. The operations can comprise in response to receiving a gain value, applying the gain value to a group of feed-forward coefficients, determining a change in the gain value, and adjusting, during a clock cycle of a defined time period, a plurality of state variables of the sigma-delta modulator by multiplying each of the state variables by the scale factor that is a ratio of the gain value after determining the change in the gain value the gain value before determining the change in the gain value.

A digital microphone includes at least one integrator; a state detection and parameter control component directly coupled to an output of the integrator; and a signal processing component coupled to an output of the state detection and parameter control component, wherein a parameter of the signal processing component includes a first value in a first operational mode and a second value in a second operational mode different from the first operational mode.

In described examples, an integrated circuit (IC) includes first and second integrators, first and second weighted summers, first and second digital-to-analog converters (DACs), and a quantizer. First and second inputs of the first weighted summer are respectively connected to an output of the first integrator and an output of the second DAC. An input of the second integrator is connected to an output of the first weighted summer. An input of the second weighted summer is connected to an output of the second integrator. An input of the quantizer is connected to an output of the second weighted summer. Inputs of the first and second DACs are connected to respective outputs of the quantizer. An output of the first DAC is connected to a first input of the first integrator. A second input of the first integrator and a third input of the first weighted summer are analog signal inputs.