Patent classifications
H03M7/4012
SYSTEM AND METHOD FOR ARITHMETIC ENCODING AND DECODING
An arithmetic encoder is provided for converting an event sequence comprised of a plurality of events to an information sequence comprised of at least one information piece, and includes a core engine for receiving an event of the event sequence, and a probability estimate from a probability estimator, and generating zero or more pieces of the information sequence responsive to the received event and the probability estimate by bounding the ratio of events to information pieces. An arithmetic encoder is provided that is capable of constraining a number of events in at least one event sequence as a function of the number of generated information pieces in at least one information sequence. An arithmetic decoder is provided for converting an information sequence comprised of at least one information piece to an event sequence comprised of a plurality of events, and includes a core engine for processing at least one information piece of the information sequence from the sequencer responsive to a probability estimate received from a probability estimator to generate at least one event by accounting for a bounded ratio of events to information pieces in the information sequence.
METHOD AND APPARATUS FOR ENCODING AND DECODING IMAGES
There are disclosed various methods and apparatuses for encoding an image. In some embodiments the method comprises selecting a datastream among a first datastream and a second datastream, said first datastream and said second datastream comprising context-decision pairs, said context and decision relating to one or more images or a part of the one or more images. A context-decision pair is obtained from the selected bitstream and also an indication of the selected datastream is obtained. The datastream indication is used to select a set of registers containing parameter values relating to the selected datastream. Parameter values from the selected set of registers are provided to arithmetic encoding to form updated parameter values. Previously updated parameter values are stored to a set of registers indicated by a previous datastream indication, said previously updated parameter values relating to a datastream different than said selected datastream.
METHOD AND APPARATUS FOR PERFORMING ARITHMETIC CODING BY LIMITED CARRY OPERATION
Disclosed herein is a method of performing an arithmetic coding for data symbols, comprising: creating an interval for each of the data symbols, the interval being represented based on a starting point and a length of the interval; updating the interval for each of the data symbols; checking whether the updated interval is included in a specific range; and renormalizing the updated interval based on a result of the checking.
HYBRID RATE INTERFACE TO REDUCE POWER CONSUMPTION AND AREA IN HIGH-SPEED DACS AND DIGITAL TRANSMITTERS
An system includes a port to receive a number of bits at a first frequency. One or more cells generate a signal for a channel with a channel frequency that is N times greater than the first frequency. The cells transmit at a second frequency that is M times greater than the first frequency but is smaller than the channel frequency. Interface links are coupled between a portion of the input bits of the port and the one or more cells and the portion of the input bits is encoded by thermometer coded T bits such that each one of the T bits is encoded by M repeated parallel bits having a value of a respective T bit. Each interface link includes M interface lines between each T bit and each first cell, and M is smaller than N to reduce the number of interface lines for the T bits.
Context-based arithmetic encoding apparatus and method and context-based arithmetic decoding apparatus and method
A context-based arithmetic encoding apparatus and method and a context-based arithmetic decoding apparatus and method are provided. The context-based arithmetic decoding apparatus may determine a context of a current N-tuple to be decoded, determine a Most Significant Bit (MSB) context corresponding to an MSB symbol of the current N-tuple, and determine a probability model using the context of the N-tuple and the MSB context. Subsequently, the context-based arithmetic decoding apparatus may perform a decoding on an MSB based on the determined probability model, and perform a decoding on a Least Significant Bit (LSB) based on a bit depth of the LSB derived from a process of decoding on an escape code.
CONVERSION DEVICE, CONVERSION METHOD, REVERSE CONVERSION DEVICE, REVERSE CONVERSION METHOD, AND PROGRAM
One aspect of the present disclosure relates to a conversion device including an acquisition unit configured to acquire a first bit string having a first bit length L1; a conversion unit configured to convert, in accordance with conversion information that associates respective bit strings each having the first bit length L1 with bit strings each having a second bit length L2 uniquely assigned to the respective bit strings, the first bit string into a second bit string having the second bit length L2. The conversion information is created by searching for a clique that includes 2.sup.L1 or more nodes, from a graph including nodes and an edge representing the bit strings each having the second bit length L2 that satisfy a predetermined constraint condition.
Dynamic adaptive compression in network storage device
Methods, systems, and computer programs are presented for dynamic adaptive compression in a storage device. One method includes operations for setting a percentage factor for utilizing a first and a second compression algorithms, and for receiving incoming blocks in the memory of the storage device. The incoming blocks are compressed before being sent to permanent storage, where a portion of the incoming blocks are compressed with the first compression algorithm based on the percentage factor, and the remainder is compressed with the second compression algorithm. Further, the method includes determining that a processor utilization rate, of a processor in the storage device, is below a first predetermined threshold, and decreasing, in response to the determining, the percentage factor to decrease the portion of the incoming blocks that are compressed with the first compression algorithm, while the remainder of the incoming blocks is compressed with the second compression algorithm.
VIDEO DATA ENCODING AND DECODING METHODS AND APPARATUSES
The present application discloses video data encoding and decoding methods and apparatuses, so as to conveniently perform data encoding and decoding on video data. The method includes: arithmetic encoding, where the arithmetic encoding includes: obtaining a binary symbol of image data; and if the binary symbol is a most probable symbol MPS, updating a first encoding interval corresponding to the MPS in a logarithm domain, and if the first updated encoding interval is less than a preset range of an arithmetic encoding interval, performing normalization processing on the first encoding interval in the logarithm domain; or if the binary symbol is a least probable symbol LPS, updating a second encoding interval corresponding to the LPS in an original number domain, and performing normalization processing on the second encoding interval in the original number domain.
METHOD AND APPARATUS FOR PERFORMING ARITHMETIC CODING ON BASIS OF CONCATENATED ROM-RAM TABLE
Disclosed herein is a method of performing an arithmetic decoding for data symbols, comprising: creating a decoding table index; obtaining an upper bound value and a lower bound value of a ratio between an interval length and a point within an interval assigned to a symbol from a ROM table; obtaining initial values for a bisection search from a RAM table based on the upper bound value and the lower bound value; and searching a value of sequence in the interval, wherein the interval is determined based on the initial values.
DYNAMIC ADAPTIVE COMPRESSION IN NETWORK STORAGE DEVICE
Methods, systems, and computer programs are presented for dynamic adaptive compression in a storage device. One method includes operations for setting a percentage factor for utilizing a first and a second compression algorithms, and for receiving incoming blocks in the memory of the storage device. The incoming blocks are compressed before being sent to permanent storage, where a portion of the incoming blocks are compressed with the first compression algorithm based on the percentage factor, and the remainder is compressed with the second compression algorithm. Further, the method includes determining that a processor utilization rate, of a processor in the storage device, is below a first predetermined threshold, and decreasing, in response to the determining, the percentage factor to decrease the portion of the incoming blocks that are compressed with the first compression algorithm, while the remainder of the incoming blocks is compressed with the second compression algorithm.