Patent classifications
H03M13/293
Tracking and use of tracked bit values for encoding and decoding data in unreliable memory
A non-volatile memory system may include a tracking module that tracks logic values of bits to be stored in memory elements identified as unreliable. A record of the logic values may be generated. During decoding of the data, a log likelihood ratio module may use the record to assign log likelihood ratio values for the decoding.
PROTECTING IN-MEMORY IMMUTABLE OBJECTS THROUGH HYBRID HARDWARE/SOFTWARE-BASED MEMORY FAULT TOLERANCE
A system, method and program product that utilizes a hybrid fault tolerance system for managing data. A system is disclosed that includes: a system for partitioning memory into a set of partitions that includes a designated partition for storing immutable objects; a write system for storing an immutable object in the designated partition, wherein the immutable object is coded with a hardware-based fault tolerance system to generate a set of hardware-based codewords, and wherein the immutable object is further coded with a software-based fault tolerance system to generate a set of software-based codewords; a read system for retrieving the immutable object, wherein the read system decodes each hardware-based codeword for the immutable object, and in response to a failed decoding of a hardware-based codeword, the read system decodes the software-based codeword containing a failed hardware-based codeword.
GLOBAL ERROR RECOVERY SYSTEM
In a network storage device that includes a plurality of data storage drives, error correction and/or recovery of data stored on one of the plurality of data storage drives is performed cooperatively by the drive itself and by a storage host that is configured to manage storage in the plurality of data storage drives. When an error-correcting code (ECC) operation performed by the drive cannot correct corrupted data stored on the drive, the storage host can attempt to correct the corrupted data based on parity and user data stored on the remaining data storage drives. In some embodiments, data correction can be performed iteratively between the drive and the storage host. Furthermore, the storage host can control latency associated with error correction by selecting a particular error correction process.
Error correction circuit and operating method thereof
An error correction circuit includes: a first error correction encoder for generating a plurality of row-codewords by performing first error correction encoding on each of a plurality of messages; a second error correction encoder for generating a plurality of column-codewords; a first error correction decoder for performing first error correction decoding on each of read row-vectors corresponding to the plurality of row-codewords, and outputting a soft information of the first error correction decoding; and a second error correction decoder for determining whether each of m-bit symbols in read column-vectors corresponding to the column-codewords is reliable, based on the soft information corresponding to each of the p-bit symbols, and performing second error correction decoding on the read column-vectors, based on the determination of whether each of the m-bit symbols is reliable.
Multiple Responder Approach to Systems with Different Types of Failures
A computer implemented method for recovering erased entries within a system of arrays includes identifying a system consisting of a plurality of arrays, wherein each array consists of m rows and n columns of entries, each entry is divided into p symbols consisting of a plurality of bits, protecting the m rows and n columns of entries in the system with an erasure-correcting code allowing the recovery of a number of erased entries in such rows and columns, detecting an erasure corresponding to an entry in the identified system, and, responsive to detecting an erasure, determining the value of the erased entry according to the p symbols of one or more non-erased entries.
Data recovery in a geographically diverse storage system employing erasure coding technology and data convolution technology
Data convolution for geographically diverse storage is disclosed. Data and corresponding convolutions of data can employ erasure coding to improve robustness of access to information represented in the data. For a peer group of chunks employing a given erasure coding scheme, access to the information represented in the data can be via accessible chunks and/or recovery of a less-accessible chunk, e.g., via a deconvolution operation, via a decoding operation, via a mix of deconvolution and decoding operations. The mix of deconvolution and decoding operations can enable recovery of a less-accessible chunk that cannot be recovered by either a deconvolution or decoding operation alone. This can improve access to information represented in less-available data.
Soft chip-kill recovery for multiple wordlines failure
Techniques are described for memory writes and reads according to a chip-kill scheme that allows recovery of multiple failed wordlines. In an example, when reading data from a superblock of the memory, where the decoding of multiple wordlines failed, a computer system schedules the decoding of failed wordlines based on quantity of bit errors and updates soft information based on convergence or divergence of the scheduled decoding. Such a computer system significantly reduces decoding failures associated with data reads from the memory and allows improved data retention in the memory.
MULTI-LAYER CODE RATE ARCHITECTURE FOR COPYBACK BETWEEN PARTITIONS WITH DIFFERENT CODE RATES
Systems, methods, and apparatus related to a multi-level error correction architecture used for copying data in memory devices. In one approach, user data is stored in the first partition of a non-volatile memory. First error correction code data is generated for the user data and stored with the user data in the first partition. Second error correction code data is generated for the user data and stored outside the first partition. The second error correction code data provides an increased error correcting capability that is compatible with the error correction algorithm used with the first error correction code data. A copyback operation is used to copy the user data and the first error correction code, but not the second error correction code, to a second partition of the non-volatile memory. The second error correction code can be selectively used if there is a need to recover portions of the user data stored in the first partition.
Receiving system and method for processing digital broadcast signal in the receiving system
A transmitting system, receiving system, and a method of processing broadcast signals are disclosed. The method for processing a broadcast signal in a broadcast receiver comprises receiving a DTV signal including a data group, the data group including mobile service data, segmented known data sequences, long known data sequences and transmission parameter data, compensating carrier frequency offset of the DTV signal and channel-equalizing the carrier frequency offset compensated DTV signal using at least one of the long known data sequences and segmented known data sequences in the data group of the DTV signal, wherein the channel-equalizing includes performing a Error Correction (FEC) decoding on data located between the segmented known data sequences, and estimating Channel Impulse Response (CIR) using the FEC decoded data as known data.
Method and system for storing data locally repairable and efficient multiple encoding
Provided are methods and systems for storing data using locally repairable multiple encoding. A data storage method may include generating n N×M encoding matrices, each including an M×M first matrix, an 1×M second matrix in which all of elements have a value of 1, and an M×M third matrix that is a symmetric matrix in which respective columns are configured by changing a sequence of elements from an element set; arranging the encoding matrices into a plurality of groups; generating a data block through the first matrix, a local parity block through the second matrix, and a global parity block through the third matrix by encoding source data of a first group with a first encoding matrix among the encoding matrices arranged into the first group; and merging the global parity block with a global parity block of a second encoding matrix that is different than the first encoding matrix.