A controller for a solid state drive is proposed. The solid state drive comprises memory cells each one for storing a symbol among a plurality of possible symbols that the memory cell is designed to store. The controller comprises: an encoding unit for encoding information bits into encoded bits; a mapping unit for mapping the encoded bits into said symbols, wherein said symbols are determined based on a plurality of allowed symbols that the memory cells are allowed to store, said plurality of allowed symbols being a subset of the plurality of the possible symbols such that a plurality of forbidden symbols not allowed to be stored in the memory cells are defined among the plurality of the possible symbols, a demapping unit for demapping read symbols and for providing an indication of the reliability of the read symbols based on said plurality of forbidden symbols, and a soft decoding unit for soft decoding the read symbols according to said indication of the reliability of the read symbols thereby obtaining said information bits.

A wireless communications device includes a receiver having a phase detector configured to extract frequency offset and provide a corresponding error signal generated based on a baseband version of a received radio frequency signal and an expected transmitted data signal. The receiver has a phase-locked loop configured to generate an error correction signal based on a phase of the error signal and a predicted instantaneous phase of the error signal. The receiver has a correction circuit configured to provide a corrected baseband version of the received radio frequency signal based on the baseband version of the received radio frequency signal and the error correction signal. The receiver may have a re-encoding-based processing circuit configured to provide the expected transmitted data signal based on a preliminarily decoded symbol.