A general-purpose integrated circuit capable of scaling to meet the requirements of a beamforming system for a wide range of applications and benefit from economies of scale is disclosed. The integrated circuit includes a delay and phase correcting engine in order to reference the incoming data to a common array center and steering direction. It also includes a frequency channelization engine to perform phase-shift beamforming tasks effectively and/or frequency channelize the output data stream. A flexible reconfigurable routing logic can be included, which allows a multiplicity of operation modes, and generates a multiplicity of linear combinations of the input and internally generated data streams.

A general-purpose integrated circuit capable of scaling to meet the requirements of a beamforming system for a wide range of applications and benefit from economies of scale is disclosed. The integrated circuit includes a delay and phase correcting engine in order to reference the incoming data to a common array center and steering direction. It also includes a frequency channelization engine to perform phase-shift beamforming tasks effectively and/or frequency channelize the output data stream. A flexible reconfigurable routing logic can be included, which allows a multiplicity of operation modes, and generates a multiplicity of linear combinations of the input and internally generated data streams.

Apparatus and method for selective linearization of scalable fault tolerant frequency agile transmitters. In one embodiment, the method includes receiving timestamped carrier configurations and segmenting the timestamped carrier configurations into time segments having a pre-determined time length. The method also includes determining composite carrier configuration in a present time segment for a predetermined number of future time segments and determining a correction solution of a plurality of correction solutions associated with the composite carrier configuration in a mapping of a plurality of carrier configurations and the plurality of correction solutions. The method includes providing the correction solution to a linearizer of at least one of a plurality of multi-carrier power amplifiers. The plurality of power amplifiers are provided in one or more banks of multi-carrier power amplifiers.

An electronic device according to various embodiments of the present invention comprises: a transceiver; a power amplifier; at least one antenna; a coupler; a memory for storing reference phase information; and a processor. The processor may be configured to: transmit an output signal of a designated frequency band by using the transceiver; amplify the output signal by using the power amplifier, radiate the amplified output signal via the at least one antenna; acquire, via the coupler, the amplified output signal and a reflected signal that is the amplified output signal having been reflected from the at least one antenna; identify a reflection coefficient on the basis of the amplified output signal and the reflected signal; on the basis of phase information corresponding to the reflection coefficient, identify a difference value between the phase information corresponding to the reflection coefficient and reference phase information, among items of reference phase information, corresponding to the designated frequency band; and compensate for another output signal to be transmitted through the transceiver, at least on the basis of the difference value. In addition, various embodiments are possible.

A circuit includes an amplifier and pre-distortion circuit. The amplifier amplifies a modulated signal. The signal pre-distortion circuit performs a feed-forward pre-distortion of the modulated signal in a signal path in which the amplifier resides. The signal pre-distortion circuit includes: i) an envelope detector configured operative to provide an envelope information describing an envelope of the modulated signal; and ii) a built-in test circuit that determines distortion information describing a distortion in the signal path caused by amplitude variations. The signal pre-distortion circuit performs the feed-forward pre-distortion of the modulated signal on the basis of the distortion information.

A technique is presented for correcting phase distortion in a digital wireless transmitter. The technique includes: receiving an RF signal in an analog domain by a digital-to-RF modulator; amplitude modulating, the RF signal in accordance with a digital input code; and introducing delay in a signal path traversed by the RF signal before the digital-to-RF modulator using a delay circuit. The duration of the delay depends upon the value of the digital input code and substantially cancels out the phase distortion introduced by the digital wireless transmitter.

A technique is presented for correcting phase distortion in a digital wireless transmitter. The technique includes: receiving an RF signal in an analog domain by a digital-to-RF modulator; amplitude modulating, the RF signal in accordance with a digital input code; and introducing delay in a signal path traversed by the RF signal before the digital-to-RF modulator using a delay circuit. The duration of the delay depends upon the value of the digital input code and substantially cancels out the phase distortion introduced by the digital wireless transmitter.

The present disclosure relates to an apparatus and a method for transmitting a signal using a power amplifier in a wireless communication system in which a transceiver comprises a digital pre-distorter configured to distort an input signal based on a distortion control value, a power amplifier configured to amplify an output signal from the digital pre-distorter, an antenna configured to transmit an output signal from the power amplifier, an echo signal canceller configured to remove an echo signal which returns to the power amplifier due to a return loss of a path between the power amplifier and the antenna, from a feedback signal obtained at an output stage of the power amplifier, and a digital pre-distortion adaptation unit configured to determine the distortion control value based on an output signal from the echo signal canceller.

To reduce a hardware circuit scale and a memory capacity in a communication system reducing a PAPR. A transmitter includes a transmission processing feedback type FIR filter configured to feed back data outputted from the last stage delay element of a plurality of delay elements included in an FIR filter to the first stage delay element and configured to set an initial value to a delay element in a predetermined position, of the delay elements, and performs transmission processing by using the transmission processing feedback type FIR filter. A receiver includes a reception processing feedback type FIR filter configured similarly to the transmission processing feedback type FIR filter and performs reception processing by using the reception processing feedback type FIR filter.

A power amplifier includes an output signal generator constructed to generate, on the basis of an input AC signal, an output signal including, in cycles, a first pulse being width higher in voltage than a first reference voltage and a second pulse being width lower in voltage than the first reference voltage and a feedback circuit constructed to generate a first bias signal corresponding to the output signal and feed back the first bias signal to an input side of the output signal generator to equalize a width of the first pulse and a width of the second pulse in the cycles of the output signal.