H04B2001/045

DC OFFSET COMPENSATION IN ZERO-INTERMEDIATE FREQUENCY MODE OF A RECEIVER
20220173756 · 2022-06-02 ·

A method for operating a radio frequency communications system includes, while operating a first radio frequency communications device in a calibration mode, for each setting of a plurality of settings of a programmable gain amplifier in a receiver of the first radio frequency communications device configured in a zero-intermediate frequency mode of operation, generating an estimate of a DC offset in each of a plurality of digital samples received from an analog circuit path including the programmable gain amplifier, and storing in a corresponding storage element, a compensation value based on the estimate.

System and method for enhanced transmitter efficiency

A method for distortion compensation in a transmission link comprising obtaining information of an amplitude distribution of a signal prior to being transmitted by a transmitter, receiving the transmitted signal at a receiver and determining a received signal amplitude distribution, comparing the received signal amplitude distribution to the amplitude distribution of the signal prior to transmission and using results of the comparison to estimate the AM/AM non-linearity in the transmitter.

METHOD FOR TUNING ENVELOPE TRACKING SYSTEM AND ASSOCIATED PROCESSING MODULE

A method for tuning an envelope tracking (ET) system includes: determining a setting combination from a plurality of setting available to the ET system, wherein determining the setting combination from the plurality of setting available to the ET system includes: determining, by a processing module, a first setting in a plurality of first settings included in the plurality of settings, and configuring the ET system by the first setting; and after the ET system is configured by the first setting, determining, by the processing module, a second setting in a plurality of second settings included in the plurality of settings, and configuring the ET system by the second setting. In addition, the setting combination includes the first setting and the second setting.

Cellular Network That Dynamically Adjusts Bandwidth And Number Of MIMO Paths Based On Realized Channel Capacity
20220158672 · 2022-05-19 · ·

Described are concepts, systems and techniques for dividing a communication channel such that no single radio frequency (RF) power amplifier (PA) in a remote radio head (RRH) operates over an excessively wide frequency bandwidth. This allows efficient operation of the RF PA wherein each PA transmit path is tuned for operation at a respective one of a plurality of different center frequencies (f.sub.0, f.sub.0+Δf, . . . f.sub.0+(n−1)Δf where n is an integer corresponding to the number of RF PA transmit paths.

SYSTEMS AND RELATED TECHNIQUES FOR EFFICIENT OPERATION OF A CELLULAR NETWORK
20220149874 · 2022-05-12 ·

Described are concepts, systems and techniques for detecting whether an antenna is connected to a transmit system to thereby protect a power amplifier lineup from damage.

Apparatus and methods for bias switching of power amplifiers

Apparatus and methods for bias switching of power amplifiers are provided herein. In certain configurations, a power amplifier system includes a power amplifier that provides amplification to a radio frequency (RF) signal and a bias control circuit that biases the power amplifier. The power amplifier includes an amplification transistor that receives the RF signal at an input, and a first bias network and a second bias network each connected to the input. The bias control circuit includes a first switch, a first reference current source that provides the first reference current to the first bias network through the first switch, a second switch, and a second reference current source that provides the second reference current to the second bias network through the second switch.

Low power transmitter for sensor arrays

A low power transmitter includes a low frequency feedback loop, a high frequency switching element embedded within the low frequency feedback loop, and a mixer electrically communicating with the low frequency feedback loop and the high frequency switching element. The low frequency feedback loop employs either a voltage mode interface or a current mode interface. The high frequency switching element includes a first transistor, a second transistor, and a pair of inductive elements. Alternatively, the high frequency switching element includes a single transistor and a single inductive element.

MULTI-TRANSMISSION POWER MANAGEMENT CIRCUIT
20230253924 · 2023-08-10 ·

A multi-transmission power management circuit is provided. In embodiments disclosed herein, the multi-transmission power management circuit includes multiple quadrature power amplifier circuits each configured to concurrently generate multiple amplified radio frequency (RF) signals based on a respective modulated voltage(s). The multi-transmission power management circuit also includes an envelope tracking (ET) integrated circuit (ETIC) configured to concurrently generate multiple modulated voltages. A control circuit is configured to determine one or more of the multiple quadrature power amplifier circuits that are involved in a multi-transmission scheme. Accordingly, the control circuit can cause the ETIC to provide one or more of the multiple modulated voltages to each of the quadrature power amplifier circuits involved in the multi-transmission scheme. In this regard, the multi-transmission power management circuit can be flexibly configured to support different multi-transmission schemes.

Biasing of cascode power amplifiers for multiple power supply domains

Cascode power amplifier bias circuits suitable for operating across multiple power supply domains are provided. In certain embodiments, a power amplifier system includes a cascode power amplifier and a multi-domain bias circuit that generates at least a first cascode bias voltage for the cascode power amplifier. The multi-domain bias circuit includes a coarse regulator that generates a regulated voltage based on a power supply voltage that is operable with multiple voltage levels associated with different power supply domains, a bandgap reference circuit that is powered by the regulated voltage and outputs a bandgap reference voltage, a bias voltage generator that generates multiple selectable bias voltages based on the bandgap reference voltage, and a bias voltage selector that chooses the first cascode bias voltage from amongst the selectable bias voltages.

DIFFERENTIAL OUTPUT CIRCUITS WITH CONFIGURABLE HARMONIC REDUCTION CIRCUITS AND METHODS OF OPERATION THEREOF
20230246658 · 2023-08-03 ·

An electronic circuit includes a differential output circuit that produces a differential output signal at a differential output. A primary winding of a balun has a first balun terminal coupled to a first differential output terminal, and a second balun terminal coupled to a second differential output terminal. A configurable harmonic reduction circuit includes first and second configurable shunt capacitance circuits coupled between the first differential output terminal or the second differential output terminal, respectively, and a ground reference node. A control circuit receives tuning data associated with a calibrated tuning state. The tuning data indicates a first and second calibrated capacitance values, which are unequal, for the first and second configurable shunt capacitance circuits, respectively. The control circuit controls the first configurable shunt capacitance circuit to have the first calibrated capacitance value, and controls the second configurable shunt capacitance circuit to have the second calibrated capacitance value.