Under one aspect, a method for reducing interference in a received signal can include splitting a received signal into a first portion and a second portion, the received signal comprising a desired signal and an interference signal that spectrally overlaps the desired signal. The method also can include estimating an amplitude A(t) of the first portion as a function of time. The method also can include suppressing at least a portion of the interference signal in the estimated amplitude A(t) to generate an interference suppressed amplitude A′(t). The method also can include delaying the second portion by an amount of time corresponding to the estimation and suppression. The method also can include multiplying the interference suppressed amplitude A′(t) by the delayed second portion to obtain an output having reduced contribution from the interference signal.

A selective filtering module is arranged to filter or process the digital baseband signal consistent with a target receiving bandwidth, where the selective filtering module comprises a narrowband rejection filter and wide-band filter configured to reject an interference component that interferes with the received radio frequency signal. The narrowband rejection filter is configured to reject a first interference component, where the narrowband rejection filter comprises an adaptive notch filter (NF). The wide band rejection filter is configured to reject a second interference component in accordance with a pulse blanking technique. An electronic data processor is adapted to control one or more filter coefficients of narrowband rejection filter and the wide band rejection filter in accordance with one or more strategic filter control factors among ADC saturation, activation/deactivation of the notch filter, and a wide-band spectrum analysis.

A receiver circuit includes an interleaved ADC, a first delay circuit, a second delay circuit, a first processing channel, a second processing channel, and an interleaving ADC timing error detector circuit. The interleaved ADC includes a first ADC and a second ADC in parallel. The first delay circuit delays a first clock signal provided to the first ADC. The second delay circuit delays a second clock signal provided to the second ADC. The first processing channel processes data samples provided by the first ADC, and includes a first slicer. The second processing channel processes data samples provided by the second ADC, and includes a second slicer. The interleaving ADC timing error detector circuit controls delay of the first delay circuit and the second delay circuit based on an output signal of the first slicer, and an output signal or an input signal of the second slicer.

A system that incorporates aspects of the subject disclosure may perform operations including, for example, receiving, via an antenna, a signal generated by a communication device, detecting passive intermodulation interference in the signal, the interference generated by one or more transmitters unassociated with the communication device, and the interference determined from signal characteristics associated with a signaling protocol used by the one or more transmitters. Other embodiments are disclosed.

Certain aspects of the disclosure related to communications apparatus provides isolation between wireless protocols when operating currently while incurring the additional insertion loss based on providing the isolation only when needed. In an aspect, an apparatus include a switched filter coupled to an antenna where the switched filter includes a filter and a bypass line along with switching circuitry configured to selectively establish a bypass signal path including the bypass line or a filtered signal path including the filter. The apparatus further includes a switched filter controller configured to cause the switching circuitry to selectively connect a transceiver unit to the antenna via the bypass signal path or via the filtered signal path based at least on a frequency band of a carrier signal and a bandwidth of the carrier signal.

A method for real-time processing of a detection signal, wherein signal processing is respectively performed when a detection signal is converted from a high level to a low level or vice versa. A moment at which a level of the detection signal is converted is recorded as a start point. A status of the detection signal is then detected in real time at a current moment. A current time width is compared to a maximum interval width of pre-set interference signals, and signal levels are determined and recorded from the start point to the current moment. Using characteristics of different interference signals, anti-interference processing is performed by using a targeted edge positioning and width recognition method, so that the delay impact of filtering on signals is avoided, improving both the recognition precision of weighing data of a checkweigher and the overall performance of the checkweigher.

Architectures and techniques relate to selectively implementing certain components to filter emissions. For example, a circuit can include a filter associated with a first frequency range, a first switch, and a second switch. The first switch can be configured to, in a filter state, route a signal through the filter and configured to, in a bypass state, route the signal to an output node while bypassing the filter. The second switch can be configured to, in the filter state, route the signal from the filter to the output node.

A technology is described for a repeater architecture having a combined direct digital channelizer (DDC). The DDC can be coupled to a signal combiner and a breakout signal divider to enable bidirectional signals to be communicated to the DDC. A first direction receive amplification and filtering path can be coupled between a first antenna port and the signal combiner. A second direction receive amplification and filtering path can be coupled between a second antenna port and the signal combiner. A first direction transmit amplification and filtering path can be coupled between the breakout signal divider and the first antenna port. A second direction transmit amplification and filtering path can be coupled between the breakout signal divider and the second antenna port.

A radio frequency module includes: a switch that includes: a common terminal connected to a first common transmission path; a first selection terminal connected to a first transmission path; and a second selection terminal connected to a second transmission path, and switches between connecting the common terminal to the first selection terminal and to the second selection terminal; a transmission power amplifier disposed on the module board and on first common transmission path; and first circuit components disposed on a reception path. The first transmission path is a path through which a transmission signal of a first communication band is transferred, the second transmission path is a path through which a transmission signal of a second communication band is transferred, the switch is disposed on a first principal surface, and at least one of the first circuit components is disposed on a second principal surface.

A receiving device is provided. The receiving device includes an antenna device, a filter circuit, a transceiver, an adjustable attenuator, a circulator, and a processor. The antenna device receives a received signal. The filter circuit separates an in-band signal and an out-band signal from the received signal. The adjustable attenuator adjusts the attenuation value corresponding to the in-band signal and transmits the adjusted in-band signal to the transceiver. The circulator receives the received signal from the antenna device and transmits the received signal to the filter circuit, and the circulator receives a reflected signal from the filter circuit. The processor determines how to adjust the attenuation value corresponding to the in-band signal according to information related to the out-band signal and information related to the in-band signal that has been processed by the adjustable attenuator and the transceiver.