The present disclosure relates to a method for controlling a device comprising an oscillation circuit, configured to provide a clock signal to a radio frequency circuit, and an antenna, in which the enabling of the passage of the signal from the circuit to the antenna is delayed with respect to an instant from which a power amplifier of the circuit is enabled.

A system includes a radio frequency (RF) connector terminal that is configured to connect to an antenna, and a RF transmitter that transmits RF power to the RF connector terminal. The system further includes a power measurement unit that measures, as a first power measurement, first RF power of the RF transmitter power that is reflected via the RF connector terminal, and a controller that causes a transmission path discontinuity between the RF transmitter and the RF connector terminal. The power measurement unit further measures, as a second power measurement, second RF power of the RF transmitter power that is reflected from the discontinuity. The controller further determines if a first antenna is connected to the RF connector terminal based on the first and second power measurements.

Systems and methods are provided herein that include an improved RF switch assembly. In at least one embodiment, the RF switch assembly may have an optimized topology including a common node shared by each signal path, reducing the size and cost of the RF switch assembly and providing improved performance.

A transceiver circuit is disclosed. The transceiver circuit includes an antenna, a receiver RF chain configured to receive a receiver RF signal from the antenna, a transmitter RF chain configured to transmit a transmitter RF signal to the antenna, and a controller configured to access a CFO (carrier frequency offset) estimate, and to, for each of one or more working frequencies: cause the receiver RF chain to receive a receiver RF signal from the antenna at each working frequency, generate I/Q measurement data based at least in part on the received receiver RF signal and the CFO estimate, store the I/Q measurement data, and cause the transmitter RF chain to transmit a transmitter RF signal to the antenna at each working frequency, where the controller is further configured to cause the transmitter RF chain to transmit the I/Q measurement data for each working frequency to the antenna.

A transceiver circuit is disclosed. The transceiver circuit includes an antenna, a receiver RF chain configured to receive a receiver RF signal from the antenna, a transmitter RF chain configured to transmit a transmitter RF signal to the antenna, and a controller configured to access a CFO (carrier frequency offset) estimate, and to, for each of one or more working frequencies: cause the receiver RF chain to receive a receiver RF signal from the antenna at each working frequency, generate I/Q measurement data based at least in part on the received receiver RF signal and the CFO estimate, store the I/Q measurement data, and cause the transmitter RF chain to transmit a transmitter RF signal to the antenna at each working frequency, where the controller is further configured to cause the transmitter RF chain to transmit the I/Q measurement data for each working frequency to the antenna.

In one embodiment, a method receives a downstream signal and an upstream signal in a same frequency band. The downstream signal and the upstream signal are separated into a first path and a second path. The downstream signal using the first path and the upstream signal using the second path are amplified in an analog domain. The method isolates the downstream signal and the upstream signal from one another and sends the downstream signal downstream to a subscriber device and sends the upstream signal towards a full duplex node.

In one embodiment, a method receives a downstream signal and an upstream signal in a same frequency band. The downstream signal and the upstream signal are separated into a first path and a second path. The downstream signal using the first path and the upstream signal using the second path are amplified in an analog domain. The method isolates the downstream signal and the upstream signal from one another and sends the downstream signal downstream to a subscriber device and sends the upstream signal towards a full duplex node.

A radio frequency circuit includes: a first power amplifier capable of amplifying a first radio frequency signal and a second radio frequency signal each having a different frequency; and a second power amplifier capable of amplifying the second radio frequency signal. In a case where the first radio frequency signal and the second radio frequency signal are simultaneously transmitted, (i) under a condition that a sum of a bandwidth of the first radio frequency signal and a bandwidth of the second radio frequency signal is broader than or equal to a predetermined bandwidth, the first radio frequency signal is amplified by the first power amplifier, and the second radio frequency signal is amplified by the second power amplifier, and (ii) under a condition that the sum is narrower than the predetermined bandwidth, the first radio frequency signal and the second radio frequency signal are amplified by the first power amplifier.

The present disclosure relates to an electronic device comprising a first capacitor and a quartz crystal coupled in series between a first node and a second node; an inverter coupled between the first and second nodes; a first variable capacitor coupled between the first node and a third node; and a second variable capacitor coupled between the second node and the third node.

A high-frequency switch circuit includes a first switch configured to electrify or cut off connection between an antenna terminal and an input terminal, and a second switch configured to electrify or cut off connection between the antenna terminal and an output terminal. The first switch has a transmission line connecting the antenna terminal and the input terminal; a diode having an anode connected to a first node between the transmission line and the input terminal, and a cathode connected to a second node; and a capacitor connected to the second node and a first power supply voltage. A first control terminal is connected to the first node via a first resistor and a first inductor. The first switch further includes a charging/discharging circuit connected to a second power supply voltage and the first control terminal and charging and discharging the capacitor from the second node.