Patent classifications
H04B1/7085
Radio receiver
A radio receiver includes a downconverter for downconverting dual sideband signals such as Binary Offset Carrier (BOC) signals from multiple sources to produce an upper and a lower sideband signal, and chip-matched filters for filtering each of the sideband signals. The output of each filter is provided to a series of separate channels, one for each source, where there are at least Early, Prompt and Late gates. Each gate has a nearest-neighbour sampler and a multiplier for multiplying with an appropriate part of a spreading code, a mixer for removing Doppler or other frequency offsets and an integrator. The invention provides a means for demodulating signals such as BOC modulated satellite navigation signals in an efficient manner by using a single downconverter for the received signals of interest from the multiple sources.
RADIO RECEIVER
A radio receiver includes a downconverter for downconverting dual sideband signals such as Binary Offset Carrier (BOC) signals from multiple sources to produce an upper and a lower sideband signal, and chip-matched filters for filtering each of the sideband signals. The output of each filter is provided to a series of separate channels, one for each source, where there are at least Early, Prompt and Late gates. Each gate has a nearest-neighbour sampler and a multiplier for multiplying with an appropriate part of a spreading code, a mixer for removing Doppler or other frequency offsets and an integrator. The invention provides a means for demodulating signals such as BOC modulated satellite navigation signals in an efficient manner by using a single downconverter for the received signals of interest from the multiple sources.
RADIO RECEIVER
A radio receiver includes a downconverter for downconverting dual sideband signals such as Binary Offset Carrier (BOC) signals from multiple sources to produce an upper and a lower sideband signal, and chip-matched filters for filtering each of the sideband signals. The output of each filter is provided to a series of separate channels, one for each source, where there are at least Early, Prompt and Late gates. Each gate has a nearest-neighbour sampler and a multiplier for multiplying with an appropriate part of a spreading code, a mixer for removing Doppler or other frequency offsets and an integrator. The invention provides a means for demodulating signals such as BOC modulated satellite navigation signals in an efficient manner by using a single downconverter for the received signals of interest from the multiple sources.
Clock and data recovery circuit
Circuits and methods for performing a clock and data recovery are disclosed. In one example, a circuit is disclosed. The circuit includes an FSM. The FSM includes: a first accumulator, a second accumulator, and a third accumulator. The first accumulator is configured to receive an input phase code representing a phase timing difference between a data signal and a clock signal at each FSM cycle, to accumulate input phase codes for different FSM cycles, and to generate a first order phase code at each FSM cycle. The second accumulator is coupled to the first accumulator and configured to accumulate the input phase codes and first order phase codes for different FSM cycles, and to generate a second order phase code at each FSM cycle. The third accumulator is coupled to the second accumulator and configured to accumulate the input phase codes and second order phase codes for different FSM cycles, and to generate a third order phase code at each FSM cycle.
Clock and data recovery circuit
Circuits and methods for performing a clock and data recovery are disclosed. In one example, a circuit is disclosed. The circuit includes an FSM. The FSM includes: a first accumulator, a second accumulator, and a third accumulator. The first accumulator is configured to receive an input phase code representing a phase timing difference between a data signal and a clock signal at each FSM cycle, to accumulate input phase codes for different FSM cycles, and to generate a first order phase code at each FSM cycle. The second accumulator is coupled to the first accumulator and configured to accumulate the input phase codes and first order phase codes for different FSM cycles, and to generate a second order phase code at each FSM cycle. The third accumulator is coupled to the second accumulator and configured to accumulate the input phase codes and second order phase codes for different FSM cycles, and to generate a third order phase code at each FSM cycle.
TRANSMISSION DEVICE, WIRELESS COMMUNICATION SYSTEM, AND TRANSMISSION METHOD
A transmission device includes a modulation unit that performs chirp-spread modulation on an input information series to generate a modulation signal; a delay unit that provides, to a plurality of modulation signals obtained by duplicating the modulation signal generated by the modulation unit, delays having lengths different from each other, a difference between the delays being an integral multiple of a reciprocal of a bandwidth of the modulation signal; and a plurality of transmission antennas that transmit the plurality of modulation signals, respectively, to which the delays are provided by the delay unit.
Method and system for spread spectrum code acquisition
A code acquisition module for a direct sequence spread spectrum (DSSS) receiver includes: a Sparse Discrete Fourier transform (SDFT) module configured to perform an SDFT on a finite number of non-uniformly distributed frequencies comprising a preamble of a received DSSS frame to calculate Fourier coefficients for the finite number of non-uniformly distributed frequencies; a multiplier configured to multiply the Fourier coefficients for the finite number of non-uniformly distributed frequencies of the received DSSS frame by complex conjugate Fourier coefficients for the finite number of non-uniformly distributed frequencies to generate a cross-correlation of the received DSSS frame and the complex conjugate Fourier coefficients; and a filter module configured to input the cross-correlation and output a delay estimation for the received DSSS frame.
Method and system for spread spectrum code acquisition
A code acquisition module for a direct sequence spread spectrum (DSSS) receiver includes: a Sparse Discrete Fourier transform (SDFT) module configured to perform an SDFT on a finite number of non-uniformly distributed frequencies comprising a preamble of a received DSSS frame to calculate Fourier coefficients for the finite number of non-uniformly distributed frequencies; a multiplier configured to multiply the Fourier coefficients for the finite number of non-uniformly distributed frequencies of the received DSSS frame by complex conjugate Fourier coefficients for the finite number of non-uniformly distributed frequencies to generate a cross-correlation of the received DSSS frame and the complex conjugate Fourier coefficients; and a filter module configured to input the cross-correlation and output a delay estimation for the received DSSS frame.
Systems and methods for mitigating multipath radio frequency interference
A radio frequency transmission system and methods for mitigating multipath radio frequency interference are disclosed. Embodiments include a first helical antenna having a first radius and operable to receive a first electromagnetic signal, and a second helical antenna having a second radius and operable to receive a second electromagnetic signal. Further embodiments include a phase adjuster configured to receive the first electromagnetic signal as an input signal, apply an adjustable phase delay to the input signal, and output an adjusted electromagnetic signal. Still further embodiments include a signal combiner configured to receive the adjusted electromagnetic signal and the second electromagnetic signal and output a combined electromagnetic signal.
Systems and methods for mitigating multipath radio frequency interference
A radio frequency transmission system and methods for mitigating multipath radio frequency interference are disclosed. Embodiments include a first helical antenna having a first radius and operable to receive a first electromagnetic signal, and a second helical antenna having a second radius and operable to receive a second electromagnetic signal. Further embodiments include a phase adjuster configured to receive the first electromagnetic signal as an input signal, apply an adjustable phase delay to the input signal, and output an adjusted electromagnetic signal. Still further embodiments include a signal combiner configured to receive the adjusted electromagnetic signal and the second electromagnetic signal and output a combined electromagnetic signal.