H04J3/0623

Clock data recovery method and device for branch signal in SDH
09680585 · 2017-06-13 · ·

Disclosed are a method and a device for recovering clock data of a tributary signal in SDH, wherein the method includes that: it is to extract valid data of the signal from a time slot of each tributary in a synchronous digital hierarchy SDH frame, and store into a storage space corresponding to a time slot of each tributary in a cache; it is to recover a clock signal and a readout signal for the time slot of each tributary by means of time division multiplexing; when the readout signal for the time slot of any tributary is valid, it is to read out contents of the data from the storage space corresponding to the time slot of the tributary in the cache, and latch into a latch corresponding to the time slot; the device includes: a data extracting module, a clock recovery circuit and a data recovery module.

Methods, systems, and media for modifying the presentation of contextually relevant documents in browser windows of a browsing application
12271412 · 2025-04-08 · ·

Methods, systems, and media for presenting contextually relevant information are provided. In some implementations, the method includes: receiving information associated with a user of a user device from multiple data sources, where the user device comprises a display; identifying, without user intervention, a relevant document based on the received information associated with the user of the user device; determining that a new browser window or a new browser tab has been opened by a browser application being executed by the user device; and causing, without user intervention, the relevant document to be presented using the new browser window or new browser tab.

Holdover mode device, method and measurement and adjustment module

A holdover mode device is illustrated. When a time synchronization source is not abnormal, a digital PLL uses a time synchronization source as its input clock, and a measurement and adjustment module calculates a variation of a frequency difference between the time synchronization source and a reference clock output by an adjustable oscillator, and builds a frequency difference prediction model according to the variation of the frequency difference. When the time synchronization source is abnormal, the digital PLL uses a buffered time synchronization source as its input clock, and the measurement and adjustment module uses the frequency difference prediction model to calculate a predicted variation of the frequency difference according to buffered frequency difference values, and generates an adjustment signal for adjusting the reference clock according to the predicted variation of the frequency difference.

METHODS, SYSTEMS, AND MEDIA FOR MODIFYING THE PRESENTATION OF CONTEXTUALLY RELEVANT DOCUMENTS IN BROWSER WINDOWS OF A BROWSING APPLICATION
20250238453 · 2025-07-24 ·

Methods, systems, and media for presenting contextually relevant information are provided. In some implementations, the method includes: receiving information associated with a user of a user device from multiple data sources, where the user device comprises a display; identifying, without user intervention, a relevant document based on the received information associated with the user of the user device; determining that a new browser window or a new browser tab has been opened by a browser application being executed by the user device; and causing, without user intervention, the relevant document to be presented using the new browser window or new browser tab.

HOLDOVER MODE DEVICE
20250317231 · 2025-10-09 ·

A holdover mode device is illustrated. When a time synchronization source is not abnormal, a digital PLL uses a time synchronization source as its input clock, and a measurement and adjustment module calculates a variation of a frequency difference between the time synchronization source and a reference clock output by an adjustable oscillator, and builds a frequency difference prediction model according to the variation of the frequency difference. When the time synchronization source is abnormal, the digital PLL uses a buffered time synchronization source as its input clock, and the measurement and adjustment module uses the frequency difference prediction model to calculate a predicted variation of the frequency difference according to buffered frequency difference values, and generates an adjustment signal for adjusting the reference clock according to the predicted variation of the frequency difference.

Clock frequency synchronization method and communication apparatus
12598015 · 2026-04-07 · ·

In a method, a network device receives a combined optical signal, where the combined optical signal is obtained by coupling optical signals sent by a plurality of communication nodes. If the network device is not a master node, the network device detects whether a master label exists in the combined optical signal, where the master label indicates the master node. If it is detected that a first master label exists in the combined optical signal, where the first master label indicates a first master node, the network device synchronizes a local clock frequency with a clock frequency of the first master node.

Data transmission method and apparatus, network device, system, and storage medium

The present disclosure provides a data transmission method and apparatus, a network device, a system, and a storage medium. The data transmission method includes: continuously sending downlink data frames of different rates at a first designated wavelength in a time-division multiplexing manner, with the downlink data frames carrying clock recovery information and time slot identification information of the downlink data frames of the different rates; and the clock recovery information is used for an optical network unit to perform clock recovery on the downlink data frames of the different rates, and the time slot identification information is configured to indicate time slot information of the downlink data frames of the different rates at the first designated wavelength.