H04J3/0638

SYSTEMS AND METHODS FOR SYNCHRONIZING DEVICE CLOCKS

A media system, method, and a computer program product for synchronizing device clocks including a plurality of devices having device clocks, where each device is capable of independently selecting a primary clock device from the plurality of devices to coordinate clock synchronization of the remaining devices, e.g., secondary devices. Each device can utilize the same criteria or set of rules to select the primary clock device from among the plurality of devices after an initial exchange of data during a discovery phase. The selection of the primary clock device can be based on random or arbitrary selection, or based on at least one devices characteristic exchanged within the data obtained during the discovery phase. Once selected, the primary clock device coordinates a clock synchronization sequence with each secondary device until each secondary device clock is synchronized to within a predetermined threshold with the primary clock of the primary clock device.

METHOD AND STRUCTURE FOR DETERMINING GLOBAL CLOCK AMONG SYSTEMS
20170315582 · 2017-11-02 · ·

A method and a structure for determining a global clock among systems are disclosed. When a standardized time reference is required among systems, a reference clock source may transmit a calibration signal, and a transmitting time T.sub.d (0) may be recorded. Each system may respectively record an arrival time T.sub.a (n), transmit a return signal to a signal recording unit of the reference clock source, and record a transmitting time T.sub.b (n), after receiving the calibration signal. Similarly, because of different distances, the signal recording unit may record arrival times T.sub.d (n) of the return signals subsequently, and determine time delays Delay (n) between systems and the reference clock source respectively. When all the systems are required to have a completely standardized time reference, a corresponding Delay (n) may be acquired and transmitted to each system. Each system may determine zero deviations T.sub.c (n) of various local clocks from the reference clock source, and take T.sub.c (n) as a correction parameter to correct its own system clock, so that the local clocks of all the systems have a completely standardized time reference.

Timing preservation for network communications
09807207 · 2017-10-31 · ·

Methods, systems, and apparatus for preserving timing domains of different communications types of signals in a telecommunications network are disclosed. In one aspect a network element (NE) includes a receiver configured to receive communications signals of two different communications types. The NE can include a timing analyzer configured to obtain a local reference clock (LRC), detect two different received reference clocks (RRCs) corresponding to the two different communications types, and for each received communications signal, determine a quantized value (QV) based on a difference between the LRC and the RRC. The NE can include a timing generator configured to generate, for the received communications signal, a transmit reference clock (TRC) that is referenced to, but different from, each of the LRC and the QV. The NE can include a transmitter configured to output an output signal based on the received communications signal and the TRC for the received communications signal.

Media Access Control Method With Time-Coherence and Deterministic Scheduling for Wireless Communications Network

A method of synchronizing the transmission and receipt of messages by radios within a wireless communications network. It is assumed that the radios have chip scale atomic clocks, which are externally synchronized, such as by GPS, but only at the beginning of a mission. Each radio defaults to a sleep mode, in which its receive and transmit circuitry is inactive. Each radio stores a channel plan of pre-determined base transmit times, and calculates a worst case time drift between clocks and a propagation delay value between combinations of radios. At each base transmit time, if a radio has an outgoing message to transmit, it subtracts propagation delay from the base transmit time, and transmits only at that time. Also, for each base transmit time, each radio subtracts time drift, thereby determining a receive time window during which it listens for messages from other radios.

Computer system synchronization
09794335 · 2017-10-17 · ·

A method may comprise communicating by a first computer with a second computer over a network during a first frame having a first frame duration; transmitting a first synchronization signal from the first computer to the second computer; receiving by the first computer during the first frame a second synchronization signal from the second computer; determining by the first computer a first elapsed time between a time when the first synchronization signal was transmitted by the first computer and a time when the second synchronization signal was received by the first computer; and determining by the first computer a duration for a second frame based at least in part on the first elapsed time.

Method and apparatus for efficient signaling and usage of resources for wireless communications supporting circuit switched and packet switched sessions

Method and apparatus efficiently signal and use resources for wireless communications supporting circuit switched (CS) and packet switched sessions (PS). Signaling and interaction between the wireless transmit/receive unit (WTRU), and various network entities, such as the Mobility Management Entity (MME), the Visitor Location Register (VLR), and Base Stations (BS), are used to implement circuit switched fall back (CSFB) in a PS system.

Master/slave negotiation associated with a synchronous ethernet network

A device may determine a link master/slave relationship for an Ethernet link associated with a connection between a component of the device and a component of another device. The device may determine that Synchronous Ethernet (SyncE) is to be enabled on the Ethernet link. The device may identify the component of the device as a SyncE slave or a SyncE master associated with enabling SyncE on the Ethernet link. The device may provide an indication that the component of the device has been identified as the SyncE slave or the SyncE master. The device may determine a SyncE master/slave relationship associated with enabling SyncE on the Ethernet link. The SyncE master/slave relationship may supersede the link master/slave relationship without altering the link master/slave relationship. The device may cause the component of the device to recover a clock based on the SyncE master/slave relationship rather than the link master/slave relationship.

Synchronized slotted power line communication
09749012 · 2017-08-29 · ·

A method and a device are disclosed including a PLC node having a synchronizer, a modem with a transceiver, and a computing device coupled with a power line for power line data communications. In various embodiments, a coordinator or Data Concentrator Unit (DCU) coordinates the communication of PLC nodes. The PLC nodes are configured to detect a zero crossing of the power line wave form and transmit or receive data within time slots defined with respect to the detected zero crossing. In other embodiments, the time slots may be synchronized using a frame sync signal, an external signal, or polling. In various embodiments, the time slots may be random access or assigned. In some embodiments, the modem and/or node may be placed in a sleep mode when not communicating to reduce power consumption and be awaken when an allocated time slot is approaching.

Drift compensation for a real time clock circuit
09746876 · 2017-08-29 · ·

Implementations of the present disclosure involve an apparatus and/or method for adjusting a counter in a computing system to account for drift of the counter value over time compared to another counter of the system. In particular, a processor of the computing system that includes a local counter component may access a counter component of another processor of the system, referred to as the reference counter. By comparing the value of the reference counter to the local counter, the processor may determine any drift that may have occurred over a period of time in the local counter. The calculated drift, or counter error, may be converted into one or more adjustments to the local counter to synchronize the local counter with the reference counter. In one embodiment, the adjustment to the local counter includes increasing the rate at which the local counter is incremented for a period of time.

Communication unit, control apparatus, communication system and method

A communication unit (S1, S2) for industrial automation for use in a communication system (10) of series-connected communication units (M, S1, S2). The communication unit includes a first input (E1), a first output (A1), and an internal clock generator (TG) which is adapted to provide an internal clock signal as system clock for clocking the communication unit (S1, S2), and wherein the communication unit (S1, S2) is configured to receive, via the input (E1), a serial input data stream with payload data. The communication unit (S1, S2) has a timer (ZG) for providing a time value, the timer (ZG) being adapted to provide the time value based on an input symbol clock included in the input data stream.