Methods and systems for performing clock domain crossing. The method may include receiving a start signal from an ingress domain delay device at a first egress domain delay device. The start signal may be received at a first rising edge of an egress domain clock cycle. The method may also include receiving, from the first egress domain delay device at a start receive device, the start signal at a second rising edge of the egress domain clock cycle. The second rising edge may be N egress domain clock cycles after the first rising edge. The method may also include incrementing, in response to receipt of the start signal by the start receive device, a buffer read pointer of the buffer by at least N buffer addresses, and reading, after incrementing the buffer read pointer, a second data unit from the buffer at a location indicated by the buffer read pointer.

This disclosure describes techniques for preventing message loops in communications among network devices. The techniques include preventing messages from being returned to a sending node and preventing messages from being sent more than once to any particular node. Such message loops may reverberate among network devices before triage efforts are able to stop the loop. As such, message loop prevention may help decrease the computational load among networked devices. At scale, the techniques may help prevent an exponential increase in data traffic that may propagate widely over the network. Loop prevention techniques may even prevent disabling of a network due to data traffic overload.

The forwarding of a management message received in a network device includes determining whether a previously received message sent by the same sender has looped back to the network device. The message is forwarded if the received message is not a loop back of a previously received message, and dropped otherwise.

Apparatuses, methods, and systems for synchronizing nodes of a wireless network are disclosed. One method includes identifying synchronization paths between synchronization reference nodes of the wireless network and each non-reference node of the wireless network, wherein each synchronization path includes one or more wireless hops between the synchronization reference nodes and the non-reference node, determining a number of timing slots needed for supporting each of the identified synchronization paths, and selecting at least one of the synchronization paths between each non-reference node and at least one of the synchronization reference nodes based on a number of wireless hops of each of the identified synchronization paths and the determined number of timing slots needed to support each of the identified synchronization paths.

This disclosure describes techniques for preventing message loops in communications among network devices. The techniques include preventing messages from being returned to a sending node and preventing messages from being sent more than once to any particular node. Such message loops may reverberate among network devices before triage efforts are able to stop the loop. As such, message loop prevention may help decrease the computational load among networked devices. At scale, the techniques may help prevent an exponential increase in data traffic that may propagate widely over the network. Loop prevention techniques may even prevent disabling of a network due to data traffic overload.

A device includes a clock generator configured to generate a root clock signal based on an input clock signal and a clock generator divider integer setting. The device also includes a first component coupled to the clock generator and configured to generate a first component clock signal based on the root clock signal and a first component divider integer setting. The device also includes a second component coupled to the clock generator and configured to generate a second component clock signal based on the root clock signal and a second component divider integer setting. The device also includes sync circuitry coupled to each of the clock generator, the first component, and the second component, wherein the sync circuitry is configured to perform synchronized adjustments to the root clock signal, the first component clock signal, and the second component clock signal.

A node may determine the topology of a computation system. The computation system is a network of nodes and multiple nodes are capable of being a grandmaster clock source. The method includes starting a best clock selection process, announcing clock information, and if the node is not acting grand master then receiving messages announcing clock information from other nodes of the network. Topology information is extracted from the messages, and if the node is acting grandmaster then retiring from the position of grandmaster. The best clock selection process steps are repeated until no node of the network becomes acting grandmaster.

The forwarding of a management message received in a network device includes determining whether a previously received message sent by the same sender has looped back to the network device. The message is forwarded if the received message is not a loop back of a previously received message, and dropped otherwise.

The disclosed computer-implemented method may include systems for optimizing a network environment that is synchronized with a precise time source. For example, a disclosed system can increase the accuracy and efficiency of the network environment with a method for smoothly handing off synchronization control within a group of time servers, each projecting a precise time. Additionally, another disclosed system can further increase the accuracy and efficiency of the network environment with a method for optimizing the latencies of the network environment when scheduling and routing tasks among the network environment members. Various other methods, systems, and computer-readable media are also disclosed.

A sensor may determine a sampling pattern based on a group of synchronization signals received by the sensor. The sampling pattern may identify an expected time for receiving an upcoming synchronization signal. The sensor may trigger, based on the sampling pattern, a performance of a sensor operation associated with the upcoming synchronization signal. The performance of the sensor operation may be triggered before the upcoming synchronization signal is received.