Described herein are systems, methods, and software to manage time calibration associated with an oscillator of a computing system. In one example, a computing system monitors clock cycles for an oscillator on the computing system, receives timing messages from a server, and calculates the frequency of the oscillator at intervals based on the monitored clock cycles and timing messages. The computing system further identifies a temperature from a temperature sensor at each of the intervals and generates a function to demonstrate frequency of the oscillator versus temperatures from the temperature sensor based on the identified temperatures and frequencies at the intervals.

In a network having at least one slave node including a slave clock, a method of adjusting the slave clock relative to a master clock of a master node includes, at the slave node, correcting a time of day of the slave clock using (a) a slave pulse signal having a known slave pulse rate, (b) a time-of-day counter of the slave node, and (c) a master pulse signal, based on values of the slave clock at nearest corresponding edges of the slave pulse signal and the master pulse signal, and correcting a frequency of the slave clock using the slave pulse signal, a clock signal of the slave node, and the master pulse signal, based on values of the slave clock at nearest corresponding edges of the master pulse signal. No other clock signal from outside the slave node is used for the corrections.

An industrial system for controlling backplane communication, including: a cluster manager including a primary switch linked to a primary control module, at least one Input/Output, I/O, module including a secondary switch linked to a secondary control module, a unidirectional communication line linking the cluster manager to the at least one IO module through passive base plates, wherein the cluster manager includes a transmission port and a reception port on the unidirectional communication line and the at least one Input/Output module includes a reception port on the unidirectional communication line, wherein the primary control module is configured to generate a pulse via the transmission port on the unidirectional communication line, wherein, upon reception of the pulse, the primary control module is configured to create a primary timestamp from a primary clock of the primary switch and the secondary control module is configured to create a secondary timestamp from a secondary clock of the secondary switch, wherein the primary control module is configured to send a message via the transmission port on the unidirectional communication line to the secondary control module, the message including the primary timestamp, wherein, upon reception of the message, the secondary control module is configured to synchronize the secondary clock with the primary clock based on the received primary timestamp and secondary timestamp.

The present disclosure relates to a 5G or pre-5G communication system to be provided for supporting a data transmission rate higher than that of a 4G communication system such as LTE. The method according to the present disclosure is a time synchronization method for transmitting time sensitive networking (TSN) data in a session management function (SMF) device of a mobile communication system, and may comprise a step of determining a time interval for updating time sensitive communications assistance information (TSCAI), and providing the determined time interval to respective nodes of the mobile communication system.

Systems, circuits, and methods for synchronizing devices in the time-domain are provided. A method, according to one implementation, includes determining a round-trip number based on a width of one cycle of a timestamping clock signal. The round-trip number is equal to a plurality of times that a clock signal is to be transmitted in a loop from a timing-leader component to a timing-follower component and back to the timing-leader component. The method also includes utilizing the timestamping clock signal to detect a cumulative time delay that results when the clock signal is transmitted in the loop a number of times equal to the round-trip number. The cumulative time delay is configured to enable synchronization of the timing-follower component with the timing-leader component.

A method for synchronizing a first time domain with a second time domain of a system on chip includes a detection of at least one periodic trigger event generated in the first time domain, the second time domain or in a third time domain; acquisitions, made at the instants of the at least one trigger event, of the current timestamp values representative of the instantaneous states of the time domain(s) other than the trigger time domain; a comparison, made in the third time domain, between differential durations between current timestamp values which are respectively acquired successively; and a synchronization of the second time domain with the first time domain, on the basis of the comparison.

An electronic eyewear device includes first and second systems on a chip (SoCs) having independent time bases and an inter-SoC interface that connects the first and second SoCs. The operations of the first and second SoCs are synchronized by aligning the time bases for the SoCs using a modified PTP technique. The technique includes the second SoC receiving a time synchronization message from the first SoC over the inter-SoC interface, recording a local timestamp of receipt of the time synchronization message, receiving a master timestamp corresponding to a timestamp recorded by the first SoC corresponding to the time of sending the time synchronization message by the first SoC, and calculating a time offset between the local timestamp and the master timestamp. The time bases of the first SoC and second SoC are then aligned using the calculated time offset. To account for transmission delays, multiple time offsets may be averaged.

A time-division duplexing (TDD) system reduces crosstalk associated with signals communicated by coordinated dynamic time assignment (cDTA) transceivers. In some embodiments, the TDD system has both cDTA transceivers and legacy transceivers. Based on the dynamic allocation of downstream and upstream timeslots for the cDTA transceivers, timeslots for the legacy transceivers are selectively muted in an effort to limit the amount of near-end crosstalk (NEXT) that occurs in the TDD system. Thus, subscriber lines coupled to both cDTA transceivers and legacy transceivers may be bound within the same binder without significantly increasing crosstalk to unacceptable levels.

An electronic device is disclosed. The electronic device comprises a first clock configured to operate at a frequency. First circuitry of the electronic device is configured to synchronize with the first clock. Second circuitry is configured to determine a second clock based on the first clock. The second clock is configured to operate at the frequency of the first clock, and is further configured to operate with a phase shift with respect to the first clock. Third circuitry is configured to synchronize with the second clock.

Methods, systems, and devices for wireless communications are described. A first device node, such as an end station or a user equipment (UE) associated with the end station, may receive, from a controller node of a time-sensitive network (TSN), a configuration for communicating over the TSN. The TSN may include a plurality of nodes that are synchronized according to a common synchronization configuration and that are configured for transmitting messages between the controller node and the first device node within a latency threshold condition configured for the TSN. The first device node may identifying data to transmit to a second device node of the plurality of nodes and may communicating with the second device node via a sidelink connection associated with the wireless radio access network.