A system includes: a transmitter including: a coding unit generating a first bit sequence by convolutional coding on information bits based on a code rate; a bit erasing unit generating a second bit sequence by erasing one or more bits from the first bit sequence for every predetermined first number of bits; and a modulation unit generating a symbol by modulation using the second bit sequence; and a receiver including: a demodulation unit calculating first reliabilities that can be derived from the symbol; a likelihood extension unit generating extended bit sequences each composed of bits for the first number of bits, and generating a plurality of second reliabilities by assigning first reliabilities duplicated, as the reliabilities of the extended bit sequences; and a decoding unit creating a trellis diagram using the code rate and the extended bit sequences, and assigning the second reliabilities to branches of the trellis diagram.

A turbo decoder circuit performs a turbo decoding process to recover a frame of data symbols from a received signal comprising soft decision values for each data symbol of the frame. The data symbols of the frame have been encoded with a turbo encoder comprising upper and lower convolutional encoders which can each be represented by a trellis, and an interleaver which interleaves the encoded data between the upper and lower convolutional encoders. The turbo decoder circuit comprises a clock, a configurable network circuitry for interleaving soft decision values, an upper decoder and a lower decoder. Each of the upper and lower decoders include processing elements, which are configured, during a series of consecutive clock cycles, iteratively to receive, from the configurable network circuitry, a priori soft decision values pertaining to data symbols associated with a window of an integer number of consecutive trellis stages representing possible paths between states of the upper or lower convolutional encoder. The processing elements perform parallel calculations associated with the window using the a priori soft decision values in order to generate corresponding extrinsic soft decision values pertaining to the data symbols. The configurable network circuitry includes network controller circuitry which controls a configuration of the configurable network circuitry iteratively, during the consecutive clock cycles, to provide the a priori soft decision values for the upper decoder by interleaving the extrinsic soft decision values provided by the lower decoder, and to provide the a priori soft decision values for the lower decoder by interleaving the extrinsic soft decision values provided by the upper decoder. The interleaving performed by the configurable network circuitry controlled by the network controller is in accordance with a predetermined schedule, which provides the a priori soft decision values at different cycles of the one or more consecutive clock cycles to avoid contention between different a priori soft decision values being provided to the same processing element of the upper or the lower decoder during the same clock cycle. Accordingly the processing elements can have a window size which includes a number of stages of the trellis so that the decoder can be configured with an arbitrary number of processing elements, making the decoder circuit an arbitrarily parallel turbo decoder.

A decoder circuit that supports non-linear precoded signals is disclosed. The decoder circuit comprises a modulo estimation circuit configured to receive a non-linear pre-coded quadrature amplitude modulated (QAM) data symbol and determine a modulo shift estimate associated with the received QAM data symbol, wherein the modulo shift estimate comprises a modulo shift that brings the received QAM symbol within the predetermined QAM constellation. The decoder circuit further comprises a QAM decoder circuit configured to map the received QAM data symbol to a winning constellation point, wherein the winning constellation point comprises a constellation point in an extended QAM constellation associated with the predetermined QAM constellation, and determine a quantized constellation point comprising a constellation point within the predetermined QAM constellation from the winning constellation point, based on applying the modulo shift corresponding to the modulo shift estimate to the winning constellation point.

A gaussian frequency shift keying (GFSK) detector comprising a multi-symbol detector; at least three Viterbi decoders, and a timing adjustment module. The multi-symbol detector receives a series of samples representing a received GFSK modulated signal which comprises at least three samples per symbol; and generates, for each set of samples representing an N-symbol sequence of the GFSK modulated signal, at least three sets of soft decisions values, each set of soft decision values indicating the probability that the N-symbol sequence of samples is each possible N-symbol pattern based on a different one of the at least three samples of a symbol being a centre sample of the symbol. Each Viterbi decoder generates, for each N-symbol sequence, a path metric for each possible N-symbol pattern from a different set of soft decision values according to a Viterbi decoding algorithm. The timing adjustment module generates a timing adjustment signal based on the path metrics generated by the Viterbi decoders to adjust the sample timing.

An optical module processes first FEC (Forward Error Correction) encoded data produced by a first FEC encoder. The optical module has a second FEC encoder for further coding a subset of the first FEC encoded data to produce second FEC encoded data. The optical module also has an optical modulator for modulating, based on a combination of the second FEC encoded data and a remaining portion of the first FEC encoded data that is not further coded, an optical signal for transmission over an optical channel. The second FEC encoder is an encoder for an FEC code that has a bit-level trellis representation with a number of states in any section of the bit-level trellis representation being less than or equal to 64 states. In this manner, the second FEC encoder has relatively low complexity (e.g. relatively low transistor count) that can reduce power consumption for the optical module.

Techniques are disclosed for generating a featureless low-probability-of-intercept/low-probability-of-detection (LPI/LPD) waveform via a continuously variable symbol rate transmission. A continuous-phase-modulation (CPM) signal can be represented with a phase trellis. During each symbol duration, the trellis is traversed in either a positive or negative direction in a continuous fashion from the starting phase value to the end phase value. The rate at which the trellis is traversed is varied continuously as a time-varying function. The time-varying phase velocity function, or instantaneous symbol rate, is a type of spreading code or secret key shared between the transmitter and receiver. The disclosed techniques can be implemented with CPM compromising the constant-modulus property of CPM signals.

This disclosure describes systems, methods, and devices related to enhanced constellation shaping. A device may generate payload bits associated with a frame to be sent to a first station device. The device may generate a first output bits having a first length based on the application of a first mask of one or more masks to the payload bits. The device may generate a second output bits having a second length based on the application of a second mask of the one or more masks. The device may compare the first length of the first output bits to the second length of the second output bits. The device may select the first mask or the second mask based on the comparison. The device may convert the payload bits using the selected mask before passing through a shaping encoder to generate shaped bits. The device may cause to send the frame bits and an indication of the selected mask to the first station device.

An optical module processes first FEC (Forward Error Correction) encoded data produced by a first FEC encoder. The optical module has a second FEC encoder for further coding a subset of the first FEC encoded data to produce second FEC encoded data. The optical module also has an optical modulator for modulating, based on a combination of the second FEC encoded data and a remaining portion of the first FEC encoded data that is not further coded, an optical signal for transmission over an optical channel. The second FEC encoder is an encoder for an FEC code that has a bit-level trellis representation with a number of states in any section of the bit-level trellis representation being less than or equal to 64 states. In this manner, the second FEC encoder has relatively low complexity (e.g. relatively low transistor count) that can reduce power consumption for the optical module.

An optical receiver is configured to receive optical signals representative of digital information over an optical communication link. The optical receiver is further configured to decode symbol estimates from an optical signal received over the optical communication link; to demap first bit estimates and second bit estimates from the symbol estimates; to decode third bit estimates from the first bit estimates using second FEC decoding of a second FEC scheme; and to decode fourth bit estimates from both the second bit estimates and the third bit estimates using first FEC decoding of a first FEC scheme. The optical receiver is further configured to use one or more of the third bit estimates to demap one or more of the second bit estimates. Concatenation of the first and second FEC schemes as described herein may relax design constraints on the second FEC scheme, which may reduce power consumption and design complexity.

A gaussian frequency shift keying (GFSK) detector comprising a multi-symbol detector; at least three Viterbi decoders, and a timing adjustment module. The multi-symbol detector receives a series of samples representing a received GFSK modulated signal which comprises at least three samples per symbol; and generates, for each set of samples representing an N-symbol sequence of the GFSK modulated signal, at least three sets of soft decisions values, each set of soft decision values indicating the probability that the N-symbol sequence of samples is each possible N-symbol pattern based on a different one of the at least three samples of a symbol being a centre sample of the symbol. Each Viterbi decoder generates, for each N-symbol sequence, a path metric for each possible N-symbol pattern from a different set of soft decision values according to a Viterbi decoding algorithm. The timing adjustment module generates a timing adjustment signal based on the path metrics generated by the Viterbi decoders to adjust the sample timing.