A network routing device for transmitting a frame between nodes connected to different communication networks among a plurality of communication networks is disclosed. The network routing device includes a routing processing circuit configured to determine a second network that is a routing target among the plurality of communication networks based on frame information received from a first network transmitting a frame among the plurality of communication networks. The network routing device also includes a frame conversion circuit configured to convert the frame to be compatible with the second network.

Embodiments relate to including information in a data packet transmitted by a transmitting integrated circuit (e.g., SOC) to account for a time delay associated with an unsuccessful arbitration attempt to send the data packet over a multi-drop bus. The unsuccessful arbitration attempt by the integrated circuit may delay the transmission of the data packet until the multi-drop bus becomes available for the integrated circuit to send the data packet. The data packet includes a data field to include time delay information caused by the unsuccessful arbitration attempt. A receiving integrated circuit may determine the time that the data packet would have been sent out from the transmitting integrated circuit absent the unsuccessful arbitration attempt based on the delay information. Embodiments also relate to a synchronization generator circuit in an integrated circuit that generates timing signals indicating times at which periodic events occur at another integrated circuit.

An interface for an I3C slave. The interface allows I3C slaves to also be connected to a conventional I2C bus that includes an I2C master. For this purpose, an additional adaptation device is provided that adapts the signals of the I2C bus for an I3C slave.

A device of the present invention incorporates a data block, received from a Communication Module (CM) connected via an interface, into a frame of a specific format in which a preamble for data synchronization is placed at a head, and transmits the frame to the bus while taking only a data block formed in compliance with an arbitrary Communication Protocol (CP) from a series of frames of the specific format that are constituted from signals detected from the bus. When transmitting data to the bus, the device inserts a code indicating the arbitrary CP into a head part of the preamble, and when a signal corresponding to the head part of the preamble detected from the bus is identified as the code indicating the arbitrary CP, it takes a frame with the identified code to transfer a data block within the taken frame to the CM through the interface.

Embodiments of this disclosure provide a data transmission method, a device, and a system. The method includes: The first Ethernet interface of the first communications device receives a first packet, and determines whether first indication information in the first packet indicates that the first packet is a multi-fed packet. When the first indication information indicates that the first packet is a multi-fed packet, the first communications device drops the first packet. The first Ethernet interface is an Ethernet interface used by the first communications device for connecting to a second communications device.

An array controlling system includes a database, a controlling center and an array device. The controlling center reads a plurality of data of the database. The array device includes a processing unit, a main bus and an array unit. The processing unit receives a command of the controlling center and converts the command into a communication data. The main bus is configured to transmit the communication data to the array unit. A plurality of array modules of the array unit are connected in series with each other through a serial bus, and sequentially receive the communication data. The processing unit controls each of the array modules according to the communication data. A plurality of sensing data of the array modules are collected to the processing unit. The processing unit returns the sensing data to the database or the controlling center to update the database.

Embodiments relate to a billboard circuit that stores context information received from various component circuits in an electronic device. The context information indicates an operating status of the corresponding component circuit, system or shared resources. The stored context information may be retrieved by one or more component circuits when events (e.g., turning on of a component circuit) are detected. By using the billboard circuit, a component circuit may detect changes in the operating status of other components circuits and configure or update its operations even when the changes occurred while the component circuit was asleep or disabled. The billboard circuit may monitor updating of the context information by the component circuit and initiate notification to other components circuits when certain entries of the context information is updated.

A ring-based switch has nodes with a link management logic having forward and reverse link outputs couplable to other nodes, forward and reverse link inputs adapted couplable to other nodes, and memory coupled to the link management logic. The link management logic has a first mode where packet bursts are received through the forward link input and transmitted on its forward link output. The link management logic has a second mode where packet bursts are received through the forward link input and transmitted on its reverse link output; and a third mode where packet bursts are received through the reverse link input and transmitted on its forward link output. The node transmits test packets over the forward link output and, if no acknowledgment is received over the reverse link input within a predetermined test-time interval, the link management logic configures in the second mode.

A master of a bus system for process control with one slave and a bus. A transceiver circuit transmits and receives for process control by data packets. A channel has a receive memory area. The transceiver circuit is set up to write the receive data of a data packet received via the bus into the receive memory area. The channel has at least one selection circuit, an output of the selection circuit being connected to the transceiver circuit. The selection circuit has a first input for selecting initial data. The selection circuit has a second input, the second input being connected to the receive memory area, and the selection circuit is configured to select the transmit data from the initial data and/or the data written into the receive memory area and to output the transmitted data to the transceiver circuit for a data packet to be transmitted.

A computer-implemented method for processing data, which are associated with at least one message received via a communications system, such as a bus system. The method includes: determining a first variable, which characterizes a transmitting time of the at least one message; evaluating the first variable with regard to at least one time frame of possible transmitting times of the at least one message.