H04L12/4035

METHOD, SYSTEM, AND GATEWAY FOR LINKING TIME-SENSITIVE FIELDBUSES
20220278871 · 2022-09-01 · ·

A method for linking a first time-sensitive fieldbus to a second time-sensitive fieldbus, wherein the first time-sensitive fieldbus includes a first subscriber device and has its own first time domain and wherein the second time-sensitive fieldbus includes a second subscriber device and has its own second time domain. The first time domain and the second time domain are frequency-synchronized, wherein the first and the second fieldbuses are connected to one another by a gateway for data transmission, wherein the method determines a first cycle duration of the first time domain and a second cycle duration of the second time domain by the gateway at a reference time. A time offset is determined between the first time domain and the second time domain by the gateway at the reference time.

METHOD, SYSTEM, AND GATEWAY FOR LINKING TIME-SENSITIVE FIELDBUSES
20220278872 · 2022-09-01 · ·

A method and system for networking a first time-sensitive field bus with a second time-sensitive field bus, the first time-sensitive field bus comprising a first subscriber device and having a first dedicated time domain and the second time-sensitive field bus comprising a second subscriber device and having a second dedicated time domain, the first and the second field buses being connected to each other with the aid of a gateway for data transmission.

METHOD, SYSTEM, AND GATEWAY FOR LINKING TIME-SENSITIVE FIELDBUSES
20220278873 · 2022-09-01 · ·

A method for networking a first time-sensitive field bus with a second time-sensitive field bus, the first time-sensitive field bus comprising a first subscriber device and having a first dedicated time domain, and the second time-sensitive field bus comprising a second subscriber device and having a second dedicated time domain. The first time domain and the second time domain being frequency-synchronized. The first and second field buses being connected to each other via a gateway. The method includes: storing a first subscriber device identifier in the memory of the gateway; storing a second subscriber device identifier in the memory of the gateway; determining a first cycle duration of the first field bus and a second cycle duration of the second field bus by the gateway at a reference time; and determining a time offset between the first and second time domain by the gateway at the reference time.

Active attack detection in autonomous vehicle networks

Systems, methods, computer-readable storage media, and apparatuses to provide active attack detection in autonomous vehicle networks. An apparatus may comprise a plurality of electronic control units communicably coupled by a network, and logic, at least a portion of which is implemented in hardware, the logic to: receive an indication from a first electronic control unit (ECU) of the plurality of ECUs specifying to transmit a first data frame via the network, determine, based on a message identifier (ID) of the first ECU, whether a transmit window for the first ECU is open, and permit the first ECU to transmit the first data frame via the network based on a determination that the transmit window for the first ECU is open.

Configurable Transfer Rates over a Two-Way Ethernet Link
20220294599 · 2022-09-15 ·

An apparatus for data communication includes a sensor-transceiver and control logic. The sensor-transceiver is coupled to a sensor and connects by an Ethernet link of a communication network in a vehicle to a processor-transceiver that is coupled to a processor. In an upstream direction from the sensor-transceiver to the processor-transceiver, the sensor-transceiver transmits data to the processor-transceiver over the Ethernet link at an upstream data rate, and in a downstream direction from the processor-transceiver to the sensor-transceiver, receives data from the processor-transceiver over the Ethernet link at a downstream data rate. The control logic is configured to select the upstream data rate for communication in the upstream direction to be higher than the downstream data rate for communication in the downstream direction when operating in a first mode, and to select the upstream data rate to be lower than the downstream data rate when operating in a second mode.

MICROPHONE DEVICES AND METHODS FOR OPERATING THEREOF

A microphone device includes a number N of at least two serially coupled microphones forming a microphone chain. The microphones are configured to transmit data to a controller via the microphone chain. The microphone chain is configured to output time-multiplexed data transmitted by the microphones.

Two-wire communication systems and applications

Disclosed herein are two-wire communication systems and applications thereof. In some embodiments, a slave node transceiver for low latency communication may include upstream transceiver circuitry to receive a first signal transmitted over a two-wire bus from an upstream device and to provide a second signal over the two-wire bus to the upstream device; downstream transceiver circuitry to provide a third signal downstream over the two-wire bus toward a downstream device and to receive a fourth signal over the two-wire bus from the downstream device; and clock circuitry to generate a clock signal at the slave node transceiver based on a preamble of a synchronization control frame in the first signal, wherein timing of the receipt and provision of signals over the two-wire bus by the node transceiver is based on the clock signal.

Control device and communication device
11068423 · 2021-07-20 · ·

Provided is a control device that includes: a communication unit; one or more functional units; and a communication line connecting the communication unit and the one or the plurality of functional units. The communication unit includes: a computation processing unit in which a processor executes one or more tasks; a communication circuit which handles the transmission and reception of communication frames via the communication line; and a control circuit connected to the computation processing unit and the communication circuit. The control circuit includes: a first Direct Memory Access (DMA) core for accessing the computation processing unit; a second DMA core for accessing the communication circuit; and a controller which, in response to a trigger from the computation processing part, provides sequential commands to the first DMA core and the second DMA core in accordance with a predefined descriptor table.

ISOCHRONOUS AUDIO TRANSMISSION
20210152620 · 2021-05-20 ·

In some aspects, the present disclosure provides a method for communicating audio data. In one example, the method includes determining whether a condition for each transport opportunity on an audio channel is met based on an audio sample rate and a channel rate of the audio channel. For each transport opportunity, upon determining that the condition is met for the transport opportunity, the method also includes transmitting audio sample data over the transport opportunity or receiving audio sample data at the transport opportunity.

CONTROL DEVICE AND COMMUNICATION DEVICE
20210133131 · 2021-05-06 · ·

Provided is a control device that includes: a communication unit; one or more functional units; and a communication line connecting the communication unit and the one or the plurality of functional units. The communication unit includes: a computation processing unit in which a processor executes one or more tasks; a communication circuit which handles the transmission and reception of communication frames via the communication line; and a control circuit connected to the computation processing unit and the communication circuit. The control circuit includes: a first Direct Memory Access (DMA) core for accessing the computation processing unit; a second DMA core for accessing the communication circuit; and a controller which, in response to a trigger from the computation processing part, provides sequential commands to the first DMA core and the second DMA core in accordance with a predefined descriptor table.