In a Power over Data Lines (PoDL) system that conducts differential data and DC power over the same wire pair, various DC coupling techniques are described that improve DC voltage coupling while attenuating AC common mode noise. Pairs of differential mode chokes (DMCs) are used to share current supplied by a single phase or multi-phase power supply. In one embodiment, one DMC is coupled to the line side of a common mode choke (CMC), and one DMC is coupled to the PHY side of the CMC. The line-side DMC has windings that are loosely magnetically coupled so that DMC does not present a very low impedance to AC common mode noise on the wires. Therefore, the performance of the wires' RC termination circuitry is not adversely affected by the line-side DMC when minimizing reflections of common mode signals.

The disclosed apparatus includes a plurality of differential transmitters, and a power supply circuit that supplies a power supply voltage to each of the plurality of differential transmitters. The power supply circuit includes a common circuit unit that defines the power supply voltage supplied to the plurality of differential transmitters, and a plurality of individual circuit units provided in association with the plurality of differential transmitters and each connected to the common circuit unit. Each of the plurality of individual circuit units has an output node that outputs the power supply voltage defined by the common circuit unit to a corresponding differential transmitter of the plurality of differential transmitters, and respective output nodes of the plurality of individual circuit units are connected to each other.

A single-wire communication system and a control method of the single-wire communication system are disclosed. A single-wire communication system includes a single-wire, a first communication module and a second communication module. The first communication module includes a plurality of current conveyors so as to communicate high-speed signals only with current freely from a capacitive load of the single-wire. The first communication module is connected to one side of the single-wire. The second communication module includes a plurality of current conveyors so as to communicate high-speed signals only with current freely from a capacitive load of the single-wire. The second communication module is connected to another side of the single-wire.

The present technology relates to a communication apparatus and a communication method that enable an increase in the variation of modes of connection between electronic devices. Included are: a detected mechanism corresponding to a mechanism included in a second electronic device that receives a baseband signal outputted by a first electronic device, the detected mechanism being configured to, upon the first electronic device and the second electronic device being connected, be detected by the first electronic device, and be connected to the first electronic device; a connection unit configured to, upon a connection of the first and second electronic devices being detected, connect the detected mechanism to the first electronic device; and a millimeter-wave generation unit configured to generate a signal in a millimeter wave band obtained by converting frequency from the baseband signal outputted by the first electronic device to a signal in a higher frequency band than the baseband signal. When the connection unit is connected and the baseband signal is being inputted, the millimeter-wave generation unit generates the signal in the millimeter wave band. The present technology can be applied to, for example, connection where a universal serial bus (USB) host recognizes a connection to a USB device.

The present disclosure describes exemplary line drivers for use in an exemplary wireline transmission device. In some situations, the exemplary line drivers are electrically connected to a wireline communication channel to transmit information. The exemplary line drivers prevent charge sharing, with the wireline communication channel. The exemplary line drivers disclosed herein charge various circuit nodes to various logical values such as a logical zero or a logical one, to prevent charge sharing with the wireline communication channel.

In a communications system that conducts differential data via a pair of wires, AC common mode noise is undesirably coupled to the wires in a noisy environment. A hybrid common mode choke (HCMC) attenuates the AC common mode noise while passing the differential data to a PHY. The HCMC includes a CMC (windings with the same polarity) and a differential mode choke (windings with opposite polarities). The CMC attenuates the AC common mode noise, and the DMC passes the attenuated AC common mode noise to termination circuity to eliminate it. Also disclosed is a technique for Kelvin sensing the DC voltage at the pair of wires, in a PoDL system, by detecting the voltage on wires that do not carry DC current, so as to provide a more accurate measurement.

A first receiver receives second serial data transmitted from a second circuit. A second receiver receives first serial data transmitted from a first circuit. An automatic adjustment circuit generates a control signal so as to reduce an error rate of the first serial data received by the second receiver. A second driver drives a differential transmission path according to the second serial data including the control signal. An operation parameter of a first driver is set based on the control signal included in the second serial data.

A transmission circuit includes a current output circuit that outputs a current to a first node, a first switch element provided between the first node and a first signal line, and a second switch element provided between the first node and a second signal line. When a transmission signal is at a first logic level, the first switch element is ON and the second switch element is OFF. When the transmission signal is at a second logic level, the first switch element is OFF and the second switch element is ON. The current output circuit outputs a second current in an n-bit period after the logic level of the transmission signal is inverted, and outputs a first current after the n-bit period.

A bidirectional data link includes a forward channel transmitter circuit and a forward channel receiver circuit. The forward channel transmitter circuit includes a forward channel driver circuit, and a back channel receiver circuit. The back channel receiver circuit is coupled to the forward channel driver circuit. The back channel receiver circuit includes a summation circuit and an active filter circuit. The summation circuit is coupled to the forward channel driver circuit. The active filter circuit is coupled to the summation circuit. The forward channel receiver circuit includes a forward channel receiver, and a back channel driver circuit. The back channel driver circuit is coupled to the forward channel receiver.

A buffer circuit may include an input unit coupled among first and second output nodes and a common node. The input unit may be configured to change voltage levels of first and second output nodes based on an input signal. The buffer circuit may generate an output signal swinging between a voltage and a first voltage in a first operation mode, and may generate an output signal swinging between the voltage and a second voltage having a different level from the first voltage in a second operation mode.