Patent classifications
H04L25/0284
DC offset calibration circuit
A DC offset calibration circuit for calibrating DC offset with multi-level method includes analog DC offset cancellation unit and digital DC offset cancellation unit, wherein analog DC offset cancellation unit includes first amplifier and integrator, first amplifier receives analog signal with DC offset, and transmits to integrator, and integrator transmits first feedback signal to first amplifier to output amplified signal with fixed DC offset, and digital DC offset cancellation unit includes comparator, digital circuit, digital-to-analog converter and second amplifier, where second amplifier receives amplified signal with fixed DC offset and transmits to comparator for determining DC offset value and transmitting to digital circuit, digital circuit generates logical result according to DC offset value and transmits to digital-to-analog converter, and therefore digital-to-analog converter accordingly generates second feedback signal to second amplifier, to calibrate DC offset value on second amplifier.
DC Offset Calibration Circuit
A DC offset calibration circuit for calibrating DC offset with multi-level method includes analog DC offset cancellation unit and digital DC offset cancellation unit, wherein analog DC offset cancellation unit includes first amplifier and integrator, first amplifier receives analog signal with DC offset, and transmits to integrator, and integrator transmits first feedback signal to first amplifier to output amplified signal with fixed DC offset, and digital DC offset cancellation unit includes comparator, digital circuit, digital-to-analog converter and second amplifier, where second amplifier receives amplified signal with fixed DC offset and transmits to comparator for determining DC offset value and transmitting to digital circuit, digital circuit generates logical result according to DC offset value and transmits to digital-to-analog converter, and therefore digital-to-analog converter accordingly generates second feedback signal to second amplifier, to calibrate DC offset value on second amplifier.
Driver circuit for transmitter
A driver circuit includes a first inverter, a bias-control circuit, and a second inverter. The first inverter, which is connected between a first supply voltage and ground, receives an input data signal and generates an inverted version of the input data signal. The bias-control circuit, which is connected between a second supply voltage and the first inverter, receives the inverted version of the input data signal and a bias signal, and generates a level-shifted data signal based on the inverted version of the input data signal, the bias signal, and the second supply voltage. The bias-control circuit reduces a difference between voltage levels of the second supply voltage and the inverted version of the input data signal. The second inverter is connected between the second supply voltage and ground, and further connected to the bias-control circuit and first inverter and generates an output data signal.
Tone plan for LTF compression
A method, an apparatus, and a computer program product for wireless communication are provided. In one aspect, an apparatus is configured to transmit user data in a first symbol of a first symbol type. The first symbol type has a first symbol duration, a first frequency bandwidth, and a first tone plan. The first tone plan includes a first valid start tone index, a first valid end tone index, and a first set of DC tones. The apparatus is further configured to transmit an LTF in a second symbol of a second symbol type. The second symbol type has a second symbol duration, a second frequency bandwidth, and a second tone plan. The second tone plan includes a second valid start tone index, a second valid end tone index, and a second set of DC tones.
DRIVER CIRCUIT FOR TRANSMITTER
A driver circuit includes a first inverter, a bias-control circuit, and a second inverter. The first inverter, which is connected between a first supply voltage and ground, receives an input data signal and generates an inverted version of the input data signal. The bias-control circuit, which is connected between a second supply voltage and the first inverter, receives the inverted version of the input data signal and a bias signal, and generates a level-shifted data signal based on the inverted version of the input data signal, the bias signal, and the second supply voltage. The bias-control circuit reduces a difference between voltage levels of the second supply voltage and the inverted version of the input data signal. The second inverter is connected between the second supply voltage and ground, and further connected to the bias-control circuit and first inverter and generates an output data signal.
Transmission/reception method and device for isolated communication
A transmission/reception method and device for isolated communication is proposed. The transmission/reception method includes performing transmission, wherein bit streams are extracted from data and two or more predetermined number of bits are modulated into one DC balanced symbol so as to generate a signal in which a plurality of symbols are listed, thereby transmitting the signal through an isolated communication circuit, and performing reception, wherein the signal is received through the isolated communication circuit and the plurality of symbols included in the signal are demodulated into the two or more predetermined number of bits so as to generate the bit streams and organize the bit streams into the data. The transmission/reception method and device may reduce power consumption at the same communication speed because a plurality of bits is represented by the one DC balanced symbol.
System and method for digital signaling
Systems and methods for communicating digital data over a group of conductors include encoding data based on electromagnetic parameter values associated with two or more group symbols each having an independent encoding value such that a mathematical function of the encoding values in the group symbols yields a known value and communicating the encoded data by applying signals associated with the electromagnetic parameter values to the group of conductors.
Apparatus for improved communication and associated methods
An apparatus includes a transmitter adapted to transmit encoded information to a communication link. The transmitter includes a DC balance skew generator. The DC balance skew generator is adapted to skew a DC balance of the information before information is provided to the communication link.
ELECTRICAL CURRENT BALANCING SYSTEM
A system and method for improving electrical efficiency in a system with three-phase electrical current is disclosed. The system includes components used to balance the currents between the phases and components used to tune components to minimize the lag between current and voltage for each of the phases for each of the three phase loads in a system with three phase power supplied and three phase loads.
Tone plan for LTF compression
A method, an apparatus, and a computer program product for wireless communication are provided. In one aspect, an apparatus is configured to transmit user data in a first symbol of a first symbol type. The first symbol type has a first symbol duration, a first frequency bandwidth, and a first tone plan. The first tone plan includes a first valid start tone index, a first valid end tone index, and a first set of DC tones. The apparatus is further configured to transmit an LTF in a second symbol of a second symbol type. The second symbol type has a second symbol duration, a second frequency bandwidth, and a second tone plan. The second tone plan includes a second valid start tone index, a second valid end tone index, and a second set of DC tones.