Patent classifications
H04L25/0286
Controller area network (CAN) device and method for operating a CAN device
Embodiments of a method, a device and a computer-readable storage medium are disclosed. In an embodiment, a method for operating a Controller Area Network (CAN) device involves detecting a transition of a CAN transceiver of the CAN device from a dominant state to a recessive state and in response to detecting a transition of the CAN transceiver from the dominant state to the recessive state, controlling an output impedance of the CAN transceiver to be within a predefined range of an impedance value at the dominant state while a differential driver voltage on a CAN bus connected to the CAN transceiver decreases to a predefined voltage.
Transmitting device, transmitting method, and communication system
A transmitting device of the present disclosure include: a first driver that includes a first sub-driver unit which operates on a basis of a first control signal and a second sub-driver unit which operates on a basis of, of the first control signal and a second control signal, a signal selected through a first selecting operation, and is configured to be able to set a voltage at a first output terminal; and a controller that controls the first selecting operation.
Transmission system
A transmission system comprising: an output-terminal configured to provide an output-signal; a phase-shift oscillator comprising a plurality of phase-shifters, each configured to provide one of a plurality of phase-shifted-signals; and a controller configured to provide a selected one of the phase-shifted-signals to the output-signal as a transition in the output-signal, at an instant in time that is based on one or more of the plurality of phase-shifted-signals.
DATA TRANSMISSION CIRCUIT
A data transmission circuit includes: a main driver circuit suitable for driving data to an output line; an amplitude equalization window generator circuit suitable for detecting the data transitioning from a first level to a second level; an auxiliary driver circuit suitable for driving the output line with the second level in response to a detection result of the amplitude equalization window generator circuit; and a phase equalization window generator circuit suitable for detecting whether the data consecutively has the first level, wherein the main driver circuit changes a time point of driving the data in response to a detection result of the phase equalization window generator circuit.
Driver circuit, optical module, and active optical cable
There is provided a driver circuit configured to drive a light emitting device, the driver circuit including an asymmetric circuit configured to receive an input signal and include a first capacitor coupled to the input signal and a signal having a fixed electric potential so as to generate a first signal, a delay circuit configured to receive the input signal and delay the input signal so as to generate a second signal, and an adder circuit configured to add the first signal and the second signal so as to generate a drive signal for driving the light emitting device.
Bidirectional transmission system
A first receiver receives second serial data transmitted from a second circuit. A second receiver receives first serial data transmitted from a first circuit. An automatic adjustment circuit generates a control signal so as to reduce an error rate of the first serial data received by the second receiver. A second driver drives a differential transmission path according to the second serial data including the control signal. An operation parameter of a first driver is set based on the control signal included in the second serial data.
Transmitter circuit and method of operating same
A transmitter circuit that receives parallel signals and outputs a serial signal in response to the parallel signals may include; a clock generator generating first clock signals having different respective phases, a multiplexer including selection circuits respectively configured to selectively provide at least two of the parallel signals to an output node in response to at least two of the first clock signals, and an output driver generating the serial signal by amplifying a signal at the output node.
Sliding bias method and system for reducing idling current while maintaining maximum undistorted output capability in a single-ended pulse modulated driver
Various embodiments include a system and method that control idling current of a pulse modulated driver. The system may include an audio input device configured to receive an audio input signal. The system can include sliding bias control circuitry configured to generate a sliding bias control signal based on a level of the audio input signal. The system may include sliding bias generation circuitry configured to generate a sliding bias voltage superimposed onto the audio input signal to generate a pulse modulated driver input signal that is input into an amplifier. The sliding bias voltage may be based on the sliding bias control signal.
BIDIRECTIONAL TRANSMISSION SYSTEM
A first receiver receives second serial data transmitted from a second circuit. A second receiver receives first serial data transmitted from a first circuit. An automatic adjustment circuit generates a control signal so as to reduce an error rate of the first serial data received by the second receiver. A second driver drives a differential transmission path according to the second serial data including the control signal. An operation parameter of a first driver is set based on the control signal included in the second serial data.
C-PHY training pattern for adaptive equalization, adaptive edge tracking and delay calibration
Methods, apparatus, and systems for data communication over a multi-wire, multi-phase interface are disclosed. A method of calibration includes configuring a 3-phase signal to include a high frequency component and a low frequency component during a calibration period, and transmitting a version of the 3-phase signal on each wire of a 3-wire interface. The version of the 3-phase signal transmitted on each wire is out-of-phase with the versions of the 3-phase signal transmitted on each of the other wires of the 3-wire interface. The 3-phase signal may be configured to enable a receiver to determine certain operating parameters of the 3-wire interface.