Apparatuses and methods are disclosed, including an apparatus that includes a differential driver with charge injection pre-emphasis. One such apparatus includes a pre-emphasis circuit and an output stage circuit. The pre-emphasis circuit is configured to receive differential serial signals, and buffer the differential serial signals to provide buffered differential serial signals. The output stage circuit is configured to receive the buffered differential serial signals and drive the buffered differential serial signals onto differential communication paths. The pre-emphasis circuit is configured to selectively inject charge onto the differential communication paths to assist with a signal transition on at least one of the differential communication paths. Additional embodiments are disclosed.

A user station for a bus system and a method for improving the transmission quality in a bus system are provided. The user station includes a transceiver for transmitting or receiving a message to/from at least one additional user station of the bus system via the bus system. In the bus system, exclusive, collision-free access to a bus of the bus system by a user station is at least temporarily ensured. The transceiver includes a transmission signal processing device for transmission signal processing of a transmission signal to be transmitted by the transceiver. The transmission signal processing device is configured for setting a predetermined bit symmetry of bits of the transmission signal by generating an internal transmission signal for the message. In the internal transmission signal, the dominant phase of the bits is shortened and the recessive phase of the bits is lengthened.

A circuit (200, 300, 400, 600, 700, 800) interfacing a device (20, 30, 40, 60, 80) with a line-pair includes: a diode bridge (210) having polarity-independent input terminals coupled to the line-pair; a galvanic isolation device (230, 330) receiving a transmit signal and coupling the transmit signal to its output; a variable edge delay circuit (270, 370, 572, 574, 576) that delays rising/falling edges of the transmit signal more than falling/rising edges of the transmit signal; a voltage-controlled variable resistance element (260, 360, 460) connected across output terminals of the diode bridge; and a filter connected to a control terminal of the voltage-controlled variable resistance element. The filter includes decoupled charge and discharge paths to decouple the rise time of the transmit signal from the fall time of the transmit signal. The voltage-controlled variable resistance element couples the transmit signal to the line-pair via the diode bridge.

A method, an apparatus, and a computer program product for data communication over a multi-wire, multi-phase interface are provided. The method may include providing a sequence of symbols to be transmitted on a 3-wire interface, each symbol in the sequence of symbols defining one of three voltage states for each wire of the 3-wire interface, driving all wires of the 3-wire interface to a common voltage state during a transition from a first transmitted symbol to a second transmitted symbol, driving each wire of the 3-wire interface in accordance with the second transmitted symbol after a predetermined delay. Each wire may be in a different voltage state from the other wires of the 3-wire interface during transmission of the each symbol. The common voltage state may lie between two of the three voltage states.

A method, an apparatus, and a computer program product for data communication over a multi-wire, multi-phase interface are provided. The method may include providing a sequence of symbols to be transmitted on a 3-wire interface, each symbol in the sequence of symbols defining one of three voltage states for each wire of the 3-wire interface, driving all wires of the 3-wire interface to a common voltage state during a transition from a first transmitted symbol to a second transmitted symbol, driving each wire of the 3-wire interface in accordance with the second transmitted symbol after a predetermined delay. Each wire may be in a different voltage state from the other wires of the 3-wire interface during transmission of the each symbol. The common voltage state may lie between two of the three voltage states.

The communication system includes a push-pull transmitter circuit (2) that includes a reflection signal attenuator circuit (10) configured to keep the reflection signals outside of the amplitude direction of communication signals to prevent contamination thereof. The reflection signal attenuator circuit (10) includes first and second rectifier elements (D1 and D2) connected in series to a high-side drive element and a low-side drive element (Q1 and Q2), respectively, to prevent the reflection signals from the communication signals from flowing back to a power supply side, and first and second voltage cap elements (ZD1 and ZD2) connected in parallel to the high-side drive element and the low-side drive element (Q1 and Q2), respectively, to provide (add or subtract) capping voltages equal to approximately 1.5 to 3 times upper or lower boundaries for a HIGH level voltage of the communication signals when passing the reflection signals from the communication signals therethrough.