Patent classifications
H04L25/03343
INTERFERENCE MITIGATION BASED ON SELECTED SIGNAL PATTERNS
A method for mitigating interference across analog signal lines includes receiving a digital data stream including a plurality of discrete signal patterns configured to drive a plurality of different analog signal lines. An edge buffer for each analog signal line is populated with edge data representing pulse edges of upcoming signal patterns set to drive the analog signal line. A target buffer for a target signal line is populated with target data representing a target signal pattern. Based at least in part on determining that edge buffers corresponding to one or more potentially interfering analog signal lines include edge data corresponding to post-target pulse edges, one or more potentially interfering signal patterns are identified. A selected set of the potentially interfering signal patterns are used to modify the target signal pattern to perform preemptive interference mitigation.
MIMO Antennas
Antenna arrays to be used in MIMO apparatuses are disclosed. Such an antenna array may include a plurality of array elements, wherein every second element in a first direction is a digital pre-distortion-less linear element, and every second element in the first direction is a non-linear element. In the antenna array, spacing between adjacent elements in the first direction is less than a half of a free space wavelength. A non-linear precoding is applied to transmissions from the antenna array, the non-linear precoding converting out-of-band emissions of the transmissions into reactive power in the near-field around the antenna array while ensuring that in-band signals generated by the elements remain unaffected.
Terminal
A terminal receives a slot that includes a plurality of symbols. The terminal determines the number of symbols included in a sub-frame on the basis of a time length of the symbol.
High-speed optical transceiver integrated chip drive circuit with phase delay compensation function
A high-speed optical transceiver integrated chip drive circuit with phase delay compensation function includes a transmitting end drive circuit to drive the laser to emit light to transmit signals and a receiving end drive circuit to optimize the signal degradation caused by the signal sent by the transmitting end drive circuit to the laser via the transmission backplane; a long code phase lead adjustment circuit is arranged on the main channel of the transmitting end drive circuit, and a long code phase lag adjustment circuit is set on the main channel of the receiving end drive circuit. The present invention is used to optimize high-speed signals and solve the problem that the CML drive circuit at the receiving end or the laser drive circuit at the transmitting end cannot compensate the difference between the group delay and phase delay for the high-speed signal after passing through the backplane (Laser device).
Transmitter equalization
A method includes transmitting, by a transmitter and over a transmit channel to a remote device, a signal that includes a plurality of signal points and receiving, by a receiver and over a receive channel from the remote device, a response signal that includes a plurality of response points corresponding to the plurality of signal points. The method also includes adjusting the plurality of signal points of the signal until logical values of the plurality of response points invert to produce an adjusted signal, estimating, based on the adjusted signal, a pulse response of the transmit channel, and applying equalization in the transmitter based on the estimated pulse response to reduce an effect of the pulse response on the signal.
WIDEBAND TRANSMISSION CIRCUIT
A wideband transmission circuit is provided. The wideband transmission circuit includes a transceiver circuit and a power amplifier circuit(s). The transceiver circuit generates a radio frequency (RF) signal(s) from a time-variant input vector and provides the RF signal(s) to the power amplifier circuit(s). The power amplifier circuit(s) amplifies the RF signal(s) based on a modulated voltage and provides the amplified RF signal(s) to a coupled RF front-end circuit (e.g., filter/multiplexer circuit). In embodiments disclosed herein, the transceiver circuit is configured to apply an equalization filter to the time-variant input vector to thereby compensate for a voltage distortion filter caused by a coupling of the power amplifier circuit(s) and the RF front-end circuit. As a result, it is possible to reduce undesired instantaneous excessive compression and/or spectrum regrowth resulting from the voltage distortion filter to thereby improve efficiency and linearity of the power amplifier circuit(s).
High-speed Optical Transceiver Integrated Chip Drive Circuit with Phase Delay Compensation Function
A high-speed optical transceiver integrated chip drive circuit with phase delay compensation function includes a transmitting end drive circuit to drive the laser to emit light to transmit signals and a receiving end drive circuit to optimize the signal degradation caused by the signal sent by the transmitting end drive circuit to the laser via the transmission backplane; a long code phase lead adjustment circuit is arranged on the main channel of the transmitting end drive circuit, and a long code phase lag adjustment circuit is set on the main channel of the receiving end drive circuit. The present invention is used to optimize high-speed signals and solve the problem that the CML drive circuit at the receiving end or the laser drive circuit at the transmitting end cannot compensate the difference between the group delay and phase delay for the high-speed signal after passing through the backplane (Laser device).
SIGNAL TRANSMISSION CIRCUIT ELEMENT, MULTIPLEXER CIRCUIT ELEMENT AND DEMULTIPLEXER CIRCUIT ELEMENT
A signal transmission circuit element, a multiplexer circuit element and a demultiplexer circuit element are disclosed. The signal transmission circuit element is connected among multiple electronic modules so as to transmit an electrical signal. The signal transmission circuit element includes an input terminal, an input equalizer, an output driver and an output terminal. The input terminal is for inputting an electrical signal to the input equalizer. The output driver is electrically connected to the input equalizer. The output terminal is electrically connected to the output driver so as to output the electrical signal. Accordingly, after the input terminal receives the electrical signal, the input equalizer can perform gain compensation on the electrical signal, and then an output capacitance of the electrical signal is driven by the output driver and outputted through the output terminal.
Equalizer and transmitter including the same
An integrated circuit for generating an equalized signal, according to a channel, from serial data includes a shift register that extracts a symbol sequence from the serial data. A data storage stores values of an equalized digital signal corresponding to potential symbol sequences corresponding to a filter coefficient sequence. A lookup table outputs the equalized digital signal of a value corresponding to the extracted symbol sequence. A digital-to-analog converter (DAC) converts the equalized digital signal into the equalized signal. A controller refreshes the lookup table, based on at least one of values stored in the data storage and values included in the lookup table, in response to a control signal.
FREQUENCY DRIFT COMPENSATION IN A DISTRIBUTED MULTIPLE-INPUT-MULTIPLE-OUTPUT NETWORK
The present disclosure concerns a method of estimation and correction, at the level of a base station, of a frequency drift (ΔF1, ΔFi, ΔFN) between signals transmitted by a plurality of antenna systems (306_1, 306_i, 306_N) spatially distributed around a computing unit of the base station (304) and signals received by a radio device (310).