Methods and systems described include a first dielectric material having a plurality of embedded conductors of a multi-wire channel, the plurality of embedded conductors comprising at least a first, second and third conductor, wherein a first distance between the first and second conductors is less than a second distance between the first and third conductors, wherein the first dielectric material has a first dielectric constant ∈.sub.1 and a second dielectric material embedded in the first dielectric material, the second dielectric material embedded in between the first and third conductors, the second dielectric material having a second dielectric constant ∈.sub.2, wherein ∈.sub.2>∈.sub.1.

A method of generating a multi-level signal having one of three or more voltage levels that are different from each other, the method including: performing a first voltage setting operation in which first and second voltage intervals are adjusted to be different from each other, wherein the first voltage interval represents a difference between a first pair of adjacent voltage levels and the second voltage interval represents a difference between a second pair of adjacent voltage levels; performing a second voltage setting operation in which a voltage swing width is adjusted, the voltage swing width representing a difference between a lowest and a highest voltage level among the three or more voltage levels; and generating an output data signal that is the multi-level signal based on input data including two or more bits, a result of the first voltage setting operation and a result of the second voltage setting operation.

A data processing method and an apparatus, where the method includes receiving m data streams using m receive ports respectively, where the m data streams include m×m data units, and the m×m data units form an m-order matrix A, keeping a location of one element in each row in the matrix A unchanged and moving remaining m−1 elements to remaining m−1 rows respectively in order to form an m-order matrix B, where a column number of each element in the remaining m−1 elements in the matrix A before the element is moved equals a column number of the element in the remaining m−1 elements in the matrix B after the element is moved, and sending using m transmit ports, the m×m elements in the matrix B to m different levels of a pulse amplitude modulation (PAM) circuit respectively for performing modulation.

A receiver, which is compatible with a mobile industry processor interface (MIPI) C-PHY physical layer, includes a plurality of variable-gain amplifiers responsive to respective multi-level signals (e.g., 3-level signals), and a plurality of filters having variable cutoff frequencies. The plurality of filters are responsive to respective signals generated by the plurality of amplifiers. An array of comparators is provided, which is responsive to signals generated by the plurality of filters. A jitter detection circuit is provided, which is configured to set respective gains of the plurality of variable-gain amplifiers and respective cutoff frequencies of the plurality of filters (e.g., high-pass filters), in response to signals generated by the array of comparators.

A power feeding apparatus is provided. The power feeding apparatus includes a power feeding unit configured to supply electric power to a power receiving apparatus through a magnetic field; a measuring unit configured to measure an electric characteristic value and to generate a measurement value; a power receiving unit configured to provide a set value; and a foreign substance detection unit configured to detect a foreign substance in the magnetic field based on the set value and the measurement value. A power receiving apparatus, a power feeding system, and a method of controlling power feeding are also provided.

A communication method, a communications apparatus, and a storage medium are disclosed, to reduce a probability that consecutive bit errors occur in a communications system. A received to-be-sent signal is modulated to obtain a modulated signal, and N rounds of operations are further performed on the modulated signal to obtain an encoded signal. An output of the 1.sup.st-round operation in the N rounds of operations is determined based on the modulated signal and an output that is of the N.sup.th-round operation and that is processed by a first delay circuit, and an output of the i.sup.th-round operation in the N rounds of operations is determined based on an output of the (i−1).sup.th-round operation and an output that is of the N.sup.th-round operation and that is processed by a second delay circuit, where i is an integer greater than 1 and less than or equal to N.

A multi-level signal transmitter includes a voltage selection circuit, which is configured to select one amongst a plurality of driving voltages, which have different voltage levels, in response to input data including at least two bits of data therein. A driver circuit is also provided, which is configured to generate an output data signal as a multi-level signal, in response to the selected one of the plurality of driving voltages. This selected signal is provided as a body bias voltage to at least one transistor within the driver circuit. This driver circuit may include a totem-pole arrangement of first and second MOS transistors having respective first and second body bias regions therein, and at least one of the first and second body bias regions may be responsive to the selected one of the plurality of driving voltages.

Optimized continuous time linear equalization (CTLE) circuit parameters for a received signal are found using an iterative search process. The received signal is repeatedly sampled by an analog-to-digital converter (ADC). Certain samples containing interference that cannot be cancelled by a CTLE in the sampled series are filtered out (discarded). The remaining samples are used to generate, over a selected evaluation window, a histogram of the sampled values. This histogram is used to calculate a figure of merit for the current CTLE parameter settings. The figures of merit for various CTLE parameter settings are compared to find the set of CTLE parameter settings that optimize the figure of merit and by extension, optimize the CTLE circuitry's performance at equalizing the received signal.

A transmitter according to the disclosure includes: three first driver sections; three first pre-driver sections that are provided corresponding to the respective three first driver sections, and each drive corresponding one of the first driver sections on a basis of corresponding one of three first control signals that are different from one another and each including predetermined number of signals; a second pre-driver section that operates on a basis of a second control signal that includes predetermined number of signals; and a controller that controls transition of the predetermined number of signals included in the second control signal to allow number of signals to be subjected to the transition out of the plurality of signals included in the three first control signals and the plurality of signals included in the second control signal to be same between timings of the transition.

An optical modulator includes an optical waveguide including at least a first PN junction phase shifter and a second PN junction phase shifter. A driver circuit drives operation of the first and second PN junction phase shifters in response to a pulse amplitude modulated (PAM) analog signal having 2.sup.n levels. The PAM analog signal is generated by a digital to analog converter that receives an n-bit input signal. In an implementation, the optical waveguide and PN junction phase shifters are formed on a first integrated circuit chip and the driver circuit is formed on a second integrated circuit chip that is stacked on and electrically connected to the first integrated circuit chip.