H04L25/493

Architecture for resolution of data and refresh-path conflict for low-power digital isolator

An encoding and transmitting system for a digital isolator system includes a transmitter for transmitting combined edge indicator signals through an isolation barrier, an encoder for generating the combined edge indicator signals based on first and second signals, a refresh clock generator for generating a refresh clock signal based on the first signal, and a refresh edge generator for masking at least a portion of the refresh clock signal, such that the portion of the refresh clock signal is not reflected in the second signal. The isolation barrier of the digital isolator system may be a capacitive isolation barrier for galvanically isolating a receiver from the transmitter. If desired, the refresh edge generator may include a refresh mask generator, one or more logic gates, and a glitch filter. A method of operating a digital isolator system is also described.

C-PHY HALF-RATE WIRE STATE ENCODER AND DECODER
20210126819 · 2021-04-29 ·

Methods, apparatus, and systems provide improved throughput on a communication link. An apparatus has a plurality of line drivers, a first wire state encoder configured to receive a first symbol in a sequence of symbols when a 3-wire link is in a first signaling state, and to define a second signaling state for the 3-wire link based on the first symbol and the first signaling state, a second wire state encoder configured to receive a second symbol in the sequence of symbols, and to define a third signaling state for the 3-wire link based on the second symbol and the second signaling state. The first symbol immediately precedes the second symbol in the sequence of symbols. The 3-wire link transitions from the first to the second signaling state, and from the second to the third signaling state in consecutive transmission intervals.

C-PHY HALF-RATE WIRE STATE ENCODER AND DECODER
20210126819 · 2021-04-29 ·

Methods, apparatus, and systems provide improved throughput on a communication link. An apparatus has a plurality of line drivers, a first wire state encoder configured to receive a first symbol in a sequence of symbols when a 3-wire link is in a first signaling state, and to define a second signaling state for the 3-wire link based on the first symbol and the first signaling state, a second wire state encoder configured to receive a second symbol in the sequence of symbols, and to define a third signaling state for the 3-wire link based on the second symbol and the second signaling state. The first symbol immediately precedes the second symbol in the sequence of symbols. The 3-wire link transitions from the first to the second signaling state, and from the second to the third signaling state in consecutive transmission intervals.

Phase rotation circuit for eye scope measurements
10965290 · 2021-03-30 · ·

Methods and systems are described for generating, with a local oscillator and an adjustable phase interpolator, a data-sampling clock and a variable-phase-offset eye-measurement clock, forming a received data signal using a multi-input comparator, generating, using a data slicer and the data sampling clock, a receive sample of the received data signal, and generating, using at least one eye slicer and the variable-phase-offset eye-measurement clock, a plurality of eye characteristic measurements by adjusting a sampling threshold of the at least one eye slicer and a phase offset of the variable-phase-offset eye-measurement clock.

Phase rotation circuit for eye scope measurements
10965290 · 2021-03-30 · ·

Methods and systems are described for generating, with a local oscillator and an adjustable phase interpolator, a data-sampling clock and a variable-phase-offset eye-measurement clock, forming a received data signal using a multi-input comparator, generating, using a data slicer and the data sampling clock, a receive sample of the received data signal, and generating, using at least one eye slicer and the variable-phase-offset eye-measurement clock, a plurality of eye characteristic measurements by adjusting a sampling threshold of the at least one eye slicer and a phase offset of the variable-phase-offset eye-measurement clock.

Low power physical layer driver topologies

System, methods and apparatus are described that facilitate transmission of data, particularly between two devices within electronic equipment. Transmission lines are selectively terminated in an N-phase polarity encoded transmitter when the transmission lines would otherwise be undriven. Data is mapped to a sequence of symbols to be transmitted on a plurality of wires. The sequence of symbols is encoded in three signals. A first terminal of a plurality of terminals may be driven such that transistors are activated to couple the first terminal to first and second voltage levels. The first terminal may further be driven such that a dedicated transistor is activated to couple the first terminal to an intermediate voltage level.

Low power physical layer driver topologies

System, methods and apparatus are described that facilitate transmission of data, particularly between two devices within electronic equipment. Transmission lines are selectively terminated in an N-phase polarity encoded transmitter when the transmission lines would otherwise be undriven. Data is mapped to a sequence of symbols to be transmitted on a plurality of wires. The sequence of symbols is encoded in three signals. A first terminal of a plurality of terminals may be driven such that transistors are activated to couple the first terminal to first and second voltage levels. The first terminal may further be driven such that a dedicated transistor is activated to couple the first terminal to an intermediate voltage level.

Method and device for transmitting wakeup packet in wireless LAN system

A method and a device for transmitting a wakeup packet in a wireless LAN system are suggested. Particularly, a transmission device configures a wakeup packet and transmits same to a reception device. The wakeup packet includes a sequence including first information and second information, by applying an OOK method. The first information and the second formation are configured with an on-signal and an off-signal. The on-signal is transferred via a first symbol generated by applying a first sequence to K number of successive subcarriers in the 20 MHz band and performing 64-point IFFT on the subcarriers. The offsignal is transferred via a second symbol generated by applying a second sequence to the K number of successive subcarriers in the 20 MHz band and performing 64-point IFNT on the subcarriers. Of the K number of subcarriers to which the first sequence is applied, a coefficient for m number of subcarriers as a unit is set to 1 or 1 for the subcarriers, and a coefficient for the remaining subcarriers is set to 0. The first information and the second information are transmitted via a third symbol configured with the first symbol and the second symbol, respectively.

Method and device for transmitting wakeup packet in wireless LAN system

A method and a device for transmitting a wakeup packet in a wireless LAN system are suggested. Particularly, a transmission device configures a wakeup packet and transmits same to a reception device. The wakeup packet includes a sequence including first information and second information, by applying an OOK method. The first information and the second formation are configured with an on-signal and an off-signal. The on-signal is transferred via a first symbol generated by applying a first sequence to K number of successive subcarriers in the 20 MHz band and performing 64-point IFFT on the subcarriers. The offsignal is transferred via a second symbol generated by applying a second sequence to the K number of successive subcarriers in the 20 MHz band and performing 64-point IFNT on the subcarriers. Of the K number of subcarriers to which the first sequence is applied, a coefficient for m number of subcarriers as a unit is set to 1 or 1 for the subcarriers, and a coefficient for the remaining subcarriers is set to 0. The first information and the second information are transmitted via a third symbol configured with the first symbol and the second symbol, respectively.

DIFFERENTIAL SIGNAL PROCESSING DEVICE USING ADVANCED BRAID CLOCK SIGNALING

A differential signal processing device is described which includes an encoder configured to encode input data into one or more differential signals and a transmitter configured to sequentially transmit the one or more differential signals using a plurality of transmission lines. The encoder converts a plurality of bits, corresponding to a transmission time interval, among the input data into an encoding code array in the transmission time interval obtained by increasing an encoding unit time, encoded for each of the one or more differential signals, by an integer multiple.