A method for determining coarse carrier phase and frequency offsets of an initial block of received M-QAM symbols includes creating a grid of discrete candidate phase offset values and for each candidate value: applying the candidate value to each symbol, applying a respective hard decision to each applied symbol, and computing a figure of merit based thereon. The candidate value having the best figure of merit is selected as an initial phase offset estimate. An initial frequency offset estimate is computed using the symbols updated with the initial phase offset estimate, their respective hard decisions, and an approximation of the complex exponential function. To track carrier phase and frequency offsets associated with a series of symbol blocks, for each symbol of a current block, set a binary trust weight based on comparison of a computed parameter with a threshold and use the binary trust weights to compute a phase offset error and a frequency offset error for the current block.

A receiver device implements enhanced data reception with edge-based clock and data recovery such as with a flash analog-to-digital converter architecture. In an example embodiment, the device implements a first phase adjustment control loop, with for example, a bang-bang phase detector, that detects data transitions for adjusting sampling at an optimal edge time with an edge sampler by adjusting a phase of an edge clock of the sampler. This loop may further adjust sampling in received data intervals for optimal data reception by adjusting the phase of a data clock of a data sampler such a flash ADC. The device may also implement a second phase adjustment control loop with, for example, a baud-rate phase detector, that detects data intervals for further adjusting sampling at an optimal data time with the data sampler.

Methods, systems, and devices for tampering detection in phase based ranging are described.

A device may engage in two-tone phase based ranging. For example, the device may transmit a composite signal that includes a first carrier at a first frequency and a second carrier at a second frequency. The device may receive a third carrier at the first frequency and measure its phase. The device may determine a phase sum associated with the first frequency based on the measured phase of the third carrier and a measured phase of the first carrier. The device may compare the phase sum with a reference value and determine whether tampering with the phase based ranging has occurred based on the comparison.

According to at least one example embodiment, a method and corresponding apparatus for controlling power in a multi-core processor chip include: accumulating, at a controller within the multi-core processor chip, one or more power estimates associated with multiple core processors within the multi-core processor chip. A global power threshold is determined based on a cumulative power estimate, the cumulative power estimate being determined based at least in part on the one or more power estimates accumulated. The controller causes power consumption at each of the core processors to be controlled based on the determined global power threshold. The controller may directly control power consumption at the core processors or may command the core processors to do so.

A phase locked loop (PLL) system for mitigating non-linear phase errors stemming from time-variant integral non-linearity of the LO feedback phase quantizer (TDC) is disclosed. The system includes a phase modulation circuit which is configured to generate a plurality of phase shifts for a reference signal; select a phase shift of the plurality of phase shifts and introduce the selected phase shift into the reference signal, thereby modulating the phase difference between the feedback and the reference signal. Alternatively, the above phase modulation can be applied on the feedback signal path, attaining equivalent results. TDC is configured to quantize the phase of the LO feedback signal relative to the shifted reference signal to generate a phase detection signal, effectively modulating the non-linearity contributed error away from the LO center frequency. The phase detection signal is then digitally compensated for the intentional fractional frequency shift to allow the PLL to generate LO signal the desired frequency.

A radio node (14) is configured to perform frequency offset estimation. The radio node (14) in this regard receives a first set (22-1) of reference symbols of a reference signal during respective time resources, and determines a first frequency offset estimate (26-1) using the first set (22-1) of reference symbols. The radio node (14) also receives a second set (22-2) of 5 reference symbols of the reference signal during respective time resources, e.g., using the same local oscillator frequency for down conversion as with the first set (22-1). The radio node (14) further determines, based on the first frequency offset estimate (26-1), a second frequency offset estimate (26-2) using the second set (22-2) of reference symbols. In some embodiments, the radio node (14) determines a third frequency offset estimate as a sum of the first and 10 second frequency offset estimates, and tunes a local oscillator frequency, or performs frequency offset compensation, based on the third frequency offset estimate.

A phase adjustment method, a related device, and a system, the method comprising obtaining phases and amplitudes of M symbols adjusting a phase of each of the M symbols to an adjusted phase, wherein the adjusting the phase of each of the M symbols to the adjusted phase includes performing at least one of setting the adjusted phase of the first symbol to the phase of the respective symbol, or setting the adjusted phase of a symbol greater than the first symbol according to the phase of the respective symbol and further according to a sum of phases of all symbols whose amplitudes are greater than an amplitude threshold in a group of one or more symbols from a first symbol to an (i1).sup.th symbol.

A system and a method that enable two or more dispersed platforms to simultaneously use respective frequency-modulated continuous-wave radar systems in a typical radar application such as synthetic-aperture radar for terrain mapping, moving-target indicator radar to track targets on the ground and air-to-air tracking of other aircraft. The systems use the same RF spectrum in their operation and also communicate through their respective radar systems while simultaneously reducing their interplatform interference through the use of both filters and coded waveforms.

A receiver device implements enhanced data reception with edge-based clock and data recovery such as with a flash analog-to-digital converter architecture. In an example embodiment, the device implements a first phase adjustment control loop, with for example, a bang-bang phase detector, that detects data transitions for adjusting sampling at an optimal edge time with an edge sampler by adjusting a phase of an edge clock of the sampler. This loop may further adjust sampling in received data intervals for optimal data reception by adjusting the phase of a data clock of a data sampler such a flash ADC. The device may also implement a second phase adjustment control loop with, for example, a baud-rate phase detector, that detects data intervals for further adjusting sampling at an optimal data time with the data sampler.

An apparatus and a method for synchronizing a Digital Frequency Shift (DFS) for a signal to be transmitted over a wireless channel are disclosed. For example, the method, by a synchronizer, transmits a DFS trigger to a Digital Front End (DFE) processor and a Local Oscillator (LO) trigger to an LO in a synchronous manner, the method, by the DFE processor, applies a DFS on received data in response to receiving the DFS trigger, the method, by the LO, applies a complementary shift on a carrier signal in response to receiving the LO trigger, the method, by the upconverter, digital-to-analog converts and radio frequency modulates the digital frequency-shifted received data and the complementary-shifted carrier signal. In another example, the method, by the synchronizer, transmits a phase error to a phase error corrector that performs a phase error correction.