A method of contactless communication can be performed between an object and a reader using active load modulation. A synchronization process is performed between a first carrier signal transmitted by the reader and having a reference frequency, and a second carrier signal extracted from an output signal of a controlled oscillator of a digital phase-locked loop of the object. In the synchronization process, as long as a locking of the loop has not been detected, the frequency of the output signal of the oscillator is latched on a frequency that is a multiple of the reference frequency. Once the locking has been detected, the latching continues while controlling the oscillator with a second control signal generated from a second value obtained.

According to at least one example embodiment, a method and corresponding apparatus for controlling power in a multi-core processor chip include: accumulating, at a controller within the multi-core processor chip, one or more power estimates associated with multiple core processors within the multi-core processor chip. A global power threshold is determined based on a cumulative power estimate, the cumulative power estimate being determined based at least in part on the one or more power estimates accumulated. The controller causes power consumption at each of the core processors to be controlled based on the determined global power threshold. The controller may directly control power consumption at the core processors or may command the core processors to do so.

A receiver signal is sampled at a sampling rate equivalent to a chip rate at which chips of a known signal are timed. The resulting receiver signal samples are segmented into receiver signal segments, which are filtered by respective matched filters that are matched to known signal segments segmented from the known signal. Indexes are assigned to elements of the resulting filter response sequences to define an array thereof. Frequency transforms are computed of elements of the filter response sequences in respective columns of the array. Indexes are assigned to elements of the resulting frequency response sequences to define another array thereof. Channel effects imparted on a radio signal are jointly estimated from characteristics of the other array at which at least one local maximum is located.

A phase locked loop (PLL) system for mitigating non-linear phase errors stemming from time-variant integral non-linearity of the LO feedback phase quantizer (TDC) is disclosed. The system includes a phase modulation circuit which is configured to generate a plurality of phase shifts for a reference signal; select a phase shift of the plurality of phase shifts and introduce the selected phase shift into the reference signal, thereby modulating the phase difference between the feedback and the reference signal. Alternatively, the above phase modulation can be applied on the feedback signal path, attaining equivalent results. TDC is configured to quantize the phase of the LO feedback signal relative to the shifted reference signal to generate a phase detection signal, effectively modulating the non-linearity contributed error away from the LO center frequency. The phase detection signal is then digitally compensated for the intentional fractional frequency shift to allow the PLL to generate LO signal the desired frequency.

A method for determining an angle of arrival (AOA) of a received signal is disclosed, comprising: generating a baseband information signal by mixing a received signal with a local oscillator (LO) signal, the received signal being an in-phase signal and quadrature signal uncorrelated with each other and derived from different input data sets; obtaining baseband signal samples of the baseband information signal having an in-phase signal sample and a quadrature signal sample; determining a transmitter phase offset based on an estimated correlation between the in-phase signal samples and the quadrature signal samples; performing a plurality of phase measurements using a plurality of antennas to obtain a plurality of phase measurements; correcting the plurality of phase measurements based on the transmitter phase offset to produce a plurality of corrected phase measurement; and calculating an AOA of the received signal based on the difference between the plurality of corrected phase measurements.

A method includes transmitting a data signal generated by adjusting a phase of a data signal, receiving a control signal having a frequency lower than that of the data signal and used to control an apparatus of a transmission destination of the data signal, and applying, in a case where a signal level of the control signal is a level, jitter to the data signal by periodically changing a magnitude of an additional phase code to be added to a phase code representative of an adjustment amount for the phase but fixing, in a case where the signal level is a level different from the level, the additional phase code to 0, receiving the data signal and adjusting a phase of the data signal to generate a data signal and restoring the control signal from a phase code representative of an adjustment amount for the phase.

A method is disclosed for synchronization, comprising obtaining baseband signal samples of a baseband information signal having an in-phase signal sample and a quadrature signal sample, the baseband information signal having been generated by mixing a received modulated carrier signal with a local oscillator (LO) signal having an LO frequency, the modulated carrier signal being an in-phase signal and quadrature signal having a substantially uncorrelated nature and derived from different input data sets; determining an offset frequency rotation based on an estimated residual correlation between the in-phase signal samples and the quadrature signal samples; and, deriving synchronization information from the offset frequency rotation, wherein the received modulated carrier signal is a quadrature-modulated signal with arbitrary orthogonal in-phase and quadrature signal components.

A method of contactless communication can be performed between an object and a reader using active load modulation. A synchronization process is performed between a first carrier signal transmitted by the reader and having a reference frequency, and a second carrier signal extracted from an output signal of a controlled oscillator of a digital phase-locked loop of the object. In the synchronization process, as long as a locking of the loop has not been detected, the frequency of the output signal of the oscillator is latched on a frequency that is a multiple of the reference frequency. Once the locking has been detected, the latching continues while controlling the oscillator with a second control signal generated from a second value obtained.

An apparatus and a method for synchronizing a Digital Frequency Shift (DFS) for a signal to be transmitted over a wireless channel are disclosed. For example, the method, by a synchronizer, transmits a DFS trigger to a Digital Front End (DFE) processor and a Local Oscillator (LO) trigger to an LO in a synchronous manner, the method, by the DFE processor, applies a DFS on received data in response to receiving the DFS trigger, the method, by the LO, applies a complementary shift on a carrier signal in response to receiving the LO trigger, the method, by the upconverter, digital-to-analog converts and radio frequency modulates the digital frequency-shifted received data and the complementary-shifted carrier signal. In another example, the method, by the synchronizer, transmits a phase error to a phase error corrector that performs a phase error correction.

A receiver device implements enhanced data reception with edge-based clock and data recovery such as with a flash analog-to-digital converter architecture. In an example embodiment, the device implements a first phase adjustment control loop, with for example, a bang-bang phase detector, that detects data transitions for adjusting sampling at an optimal edge time with an edge sampler by adjusting a phase of an edge clock of the sampler. This loop may further adjust sampling in received data intervals for optimal data reception by adjusting the phase of a data clock of a data sampler such a flash ADC. The device may also implement a second phase adjustment control loop with, for example, a baud-rate phase detector, that detects data intervals for further adjusting sampling at an optimal data time with the data sampler.