A radio receiver device is arranged to receive a radio signal modulated with a data packet including an address portion. The radio receiver comprises:

a synchronisation circuit portion arranged to produce synchronization information corresponding to the data packet;

a demodulation circuit portion comprising a correlator, wherein said demodulation circuit portion is arranged to receive the radio signal and to produce an estimate of the address portion comprising a plurality of demodulated bits using said correlator and the synchronisation information;

an address checking circuit portion arranged to receive the plurality of demodulated bits, to check said plurality of demodulated bits for a predetermined bit pattern, and to produce a match flag if it determines that the plurality of demodulated bits corresponds to the predetermined bit pattern.

The radio receiver device is arranged such that, upon detecting an upcoming timeout event, the demodulation circuit portion sends a timeout warning signal to the address checking circuit portion using a handshaking channel therebetween; said address checking circuit portion being arranged such that, if it receives the timeout warning signal, it stops checking the plurality of demodulated bits for the predetermined bit pattern.

A receiver comprises a matched filter bank, decision logic and a frequency offset estimator. The matched filter bank comprises an input for receiving data representative of a frequency- or phase-modulated signal. The decision logic generates a sequence of demodulated symbol values from outputs of the matched filter bank. The frequency offset estimator determines a first phase value from a first output and a second phase value from a second output of the matched filter bank, the second output being offset from the first by L symbol periods. It also determines a phase adjustment value from an L-symbol subsequence within the sequence of demodulated symbol values, each subsequence value being determined from values output by the matched filter bank between the first and second outputs. It estimates a frequency offset based on the difference between the first phase value plus the phase adjustment value, and the second phase value.

An N-phase vector synthesis demodulator employing N number of mixers is presented. The received signal is mixed with locally generated N number of phase-shifted carrier signals at the N mixers, the individual phases of which are successively and equally 360?/N shifted. The final in-phase (I) and quadrature-phase (Q) signals are zero-force synthesized from the demodulated N-phase vector signals. Compared with the conventional I/Q demodulator that obtains the I and Q signals directly from two mixers of 0? and 90? carrier signal phases, the multi-phase demodulator provides significantly high linearities in the demodulated I and Q signals as the zero-force synthesizer performs an optimal combining of the N-phase demodulated signals while minimizing distortions, interferences, and noise.

An embodiment of the present invention relates to a low-power broadband asynchronous BPSK demodulation method and a configuration of a circuit thereof. In connection with a configuration of a BPSK demodulation circuit, there may be provided a low-power wideband asynchronous binary phase shift keying demodulation circuit comprising: a sideband separation and lower sideband signal delay unit; a data demodulation unit; and a data clock restoration unit.

Methods and apparatuses are provided in which a signal is received at a receiver. A processor of the receiver computes frequency offset (FO) inter-carrier interference (ICI) compensation, based on a real matrix part of an approximate ICI matrix and an FO estimated from the received signal. The processor applies the FO ICI compensation to the received signal in a frequency domain to produce an ICI compensated output. The processor applies a phase rotation to the ICI compensated output.

A wireless communication device includes a radio frequency antenna and a transceiver. The transceiver includes a receiver having a switching architecture configured to generate a plurality of output phases within a local oscillator period based on the filtered RF signal and a respective plurality of local oscillator signals. The plurality of output phases can be organized into at least K groups where K is an integer of four or greater, and each nth group of the K groups includes nth and (n+K)th output phases of the plurality of output phases. The receiver can difference the nth and (n+K)th output phases of each respective group of the K groups, resulting in gain-added output phases.

Methods, systems, and apparatus for EM communications. One of the apparatus includes a super-regenerative amplifier (SRA) configured to receive a binary phase shift keying (BPSK) modulated signal and to output an amplitude signal as a function of changes in phase in the BPSK modulated signal; a pseudo synchronous demodulator that rectifies the amplitude signal and generates an envelope of the rectified amplitude signal; and an analog to digital converter that converts the amplitude values of the envelope to digital binary values.

Methods, systems, and devices for wireless communications are described. A method of wireless communication is described. A user equipment (UE) may receive an indication of one or more filter coefficients used by a base station to filter a reference signal used by the UE to determine channel quality information (CQI). The UE may receive a reference signal from the base station, and may determine the CQI based on the received reference signal and the one or more filter coefficients. The UE may transmit the determined CQI to the base station.

The present invention relates to a device and a method for detecting a transmission signal in a wireless communication system, and a reception device in a wireless communication system comprises: a transceiver for receiving a signal from a transmitting end; a first correlator for performing a first correlation and outputting a real part among the results of the first correlation; a second correlator for performing a second correlation and outputting an imaginary part among the results of the second correlation; and a control unit for controlling the first correlator and the second correlator on the basis of a channel change rate so as to detect a transmission signal.

Methods and systems are provided for converting wideband signals. In an example system, a wideband signal that includes one or more narrowband signals may be received and handled, with the handling may include selecting a subset of signal processing circuits, from a plurality of signal processing circuits in the system, with the number of selected signal processing circuits being less than the total number of signal processing circuits in the system. Only the selected signal processing circuits are then enabled, such that all remaining signal processing circuits are not enabled. Signal processing adjustment may then be applied, via the subset of signal processing circuits, only to the one or more narrowband signals, such that a remainder of the wideband signal is not adjusted. The handling of the received wideband signal may include separating the one or more narrowband signals from the wideband signal.