A radio communications method includes carrying out, by a transmitter, transmission operations that include generating digital transmission signals carrying symbols to be transmitted and having a predefined time length; and transmitting a radio frequency signal carrying, in successive, non-overlapped time frames or slots having the predefined time length, the digital transmission signals generated. The method further includes carrying out, by a receiver, reception operations that include receiving the radio frequency signal transmitted by the transmitter; processing the received radio frequency signal to obtain a corresponding digital incoming signal; applying an oversampling operation to the digital incoming signal thereby obtaining an oversampled digital incoming signal; detecting successive, non-overlapped time frames/slots with the predefined time length in the oversampled digital incoming signal; and, for each detected time frame/slot, estimating respective symbols carried by the oversampled digital incoming signal in the time frame/slot with a predefined reception matrix incorporating a predefined Kalman filter.

A communication system comprises a transmitter and a receiver that communicate differential phase modulated data over a wireline channel pair. The transmitter encodes data symbols by generating first and second data signals with differentially phase shifted signal transitions with respect to one another. The receiver receives the first data signal and the second data signal and samples the first data signal based on a signal transition timing of the second data signal to generate a first output data symbol. The receiver furthermore samples the second data signal based on signal transition timing of the first data signal to generate a second output data symbol.

A demodulation unit for recovering a transmitted symbol from a received signal that has been modulated using an MDPSK modulation scheme is described. The demodulation unit is configured to, for a current time instant, derive a current sample of a phase signal indicative of a phase of the received signal. Furthermore, the demodulation unit is configured to determine a set of discrimination signals for the current sample of the phase signal, based on the current sample of the phase signal and based on one or more previous samples of the phase signal for one or more previous time instants. In addition, the demodulation unit is configured to determine the transmitted symbol for the current time instant based on the set of discrimination signals.

A radio receiver comprises a matched filter bank and a decision unit. The matched filter bank has a plurality of filter modules for generating correlation-strength data from a sampled radio signal, each filter module being configured to cross-correlate the sampled signal with data representing a respective filter sequence. The decision unit is configured to use the correlation-strength data to generate a sequence of decoded symbols from the sampled signal. The matched filter bank and/or decision unit are configured to determine the value of each symbol in the sequence in part based on the value of a respective earlier decoded symbol from the sequence of decoded symbols.

The present disclosure discloses an M-ary DCSK method based on chaotic shape-forming filtering. The method includes the following steps: at S1, parameters of a communication system are set; at S2, HP information and LP information to be sent in each time slot are prepared; at S3, the information to be sent is modulated; at S4, a chaotic carrier is generated through a chaotic shape-forming filter; at S5, a transmitted signal is prepared; at S6, down-carrier frequency and matched filter is performed to a received signal; at S7, the sampling of a maximum SNR point is performed to an output signal of a matched filter; at S8, the decision of high priority information bits is resumed; and at S9, the decision of low priority information bits is resumed.

A communication system comprises a transmitter and a receiver that communicate differential phase modulated data over a wireline channel pair. The transmitter encodes data symbols by generating first and second data signals with differentially phase shifted signal transitions with respect to one another. The receiver receives the first data signal and the second data signal and samples the first data signal based on a signal transition timing of the second data signal to generate a first output data symbol. The receiver furthermore samples the second data signal based on signal transition timing of the first data signal to generate a second output data symbol.

Method for processing a sequence of digital signal samples comprising a first sub-sequence and a second sub-sequence, said method comprising: forming (106) a first block of samples comprising the first sub-sequence and a second block of samples comprising header samples followed by the second sub-sequence; demodulating (108) the first block of samples through a digital demodulator to produce a first block of symbols, and the second block of digital signal samples through a second digital demodulator to produce a second block of symbols, the second demodulator implementing a carrier synchronisation or symbol rate synchronisation starting with the header samples (E6-E9), which comprise samples in a number adapted in such a way that the synchronisation is effective before the second demodulator demodulates the second sub-sequence; and reconstructing (114) a sequence of symbols by concatenating the first symbol block with the second symbol block.

In accordance with an embodiment, a device configured to detect a presence of at least one digital pattern within a signal includes J memory circuits having respectively Nj memory locations; and processing circuitry comprising an accumulator configured to successively address the memory locations of the J memory circuits in a circular manner at frequency F and during an acquisition time, and successively accumulate and store values indicative of a signal intensity in parallel in the J addressed memory locations of the J memory circuits, and a detector configured to detect the possible presence of the at least one pattern.

Systems and methods are provided for measuring latency in a network device, which can include a signal generator, a sampler, a pulse detector, a timer, and a connector. The signal generator can define a signal profile. The sampler can sample the signal profile at a frequency of at least 4 GHz to generate a plurality of bits, each bit corresponding to a value of the signal profile during the sampling. The pulse detector can detect a change in the signal profile by detecting at least one change in the plurality of bits. The timer can time the change in value in the plurality of bits to provide at least one detection time measurement. The connector can electronically link the signal generator and the sampler to the network device to provide an external network path for transmitting a signal from the signal generator to the sampler via the network device.

A radio receiver comprises a matched filter bank and a decision unit. The matched filter bank has a plurality of filter modules for generating correlation-strength data from a sampled radio signal, each filter module being configured to cross-correlate the sampled signal with data representing a respective filter sequence. The decision unit is configured to use the correlation-strength data to generate a sequence of decoded symbols from the sampled signal. The matched filter bank and/or decision unit are configured to determine the value of each symbol in the sequence in part based on the value of a respective earlier decoded symbol from the sequence of decoded symbols.