Circuitry and methods are described for digital signal demodulation. In a configurable receiver, a method includes receiving a radio frequency signal at the configurable receiver, operating the configurable receiver in a first mode, the first mode including providing the radio frequency signal to an amplitude detection circuit to determine an amplitude, providing the radio frequency signal to a phase detection circuit to determine a phase, and providing the amplitude and phase to a coordinate rotation digital computer (CORDIC) logic circuit, and operating the configurable receiver in a low power mode upon receiving an indication to selectively disable the amplitude detection circuit, the low power mode including providing the radio frequency signal to the phase detection circuit to determine the phase, and providing the phase and a predetermined constant value in lieu of the amplitude to the CORDIC logic circuit.

Methods (C) for converting a data signal (U). The methods may comprise (i) providing an input symbol stream (IB) of input symbols (Bj), the input symbol stream (IB) being representative for the data signal (U) to be converted and (ii) applying to consecutive disjunct partial input symbol sequences (IB.sup.p) of a number of p consecutive input symbols (IBj) covering said input symbol stream (IB), a distribution matching process (DM) to generate and output a final output symbol stream (OB) or a preform thereof, wherein the distribution matching process (DM) may be formed by a preceding shell mapping process (SM) and a succeeding amplitude mapping process (AM), wherein said shell mapping process (SM) may be configured to form and output to said amplitude mapping process (AM) for each of said consecutive partial input symbol sequences (IB.sup.p) a sequence (s.sup.q) of a number of q shell indices (s), and wherein said amplitude mapping process (AM) may be configured to assign to each shell index (s) a tuple of amplitude values.

Method and apparatus for signal detection in dynamic channels with high carrier frequency offset are provided. A coherent detector and a non-coherent detector are operated in parallel on a block of samples of an input signal to determine respective time offset candidates of the input signal. The time offset candidate obtained from the non-coherent detector is used to determine a frequency offset candidate of the input signal.

The present application provides a non-orthogonal demodulation module, receiving a received signal and the received signal is related to a summation of a plurality of transmitted signals. The plurality of transmitted signals are corresponding to a plurality of frequencies, and the plurality of transmitted signals are not orthogonal to each other. The non-orthogonal demodulation module comprises a mixing-and-integrating unit, configured to perform mixing operations and integrating operations on the received signal respectively at the plurality of frequencies, to generate a plurality of in-phase components and a plurality of quadrature components corresponding to the plurality of frequencies; and a decoding unit, configured to generate at least a decoding matrix, and compute a plurality of energies corresponding to the plurality of transmitted signals according to the at least a decoding matrix, the plurality of in-phase components and the plurality of quadrature components.

Circuitry and methods are described for digital signal demodulation. In a configurable receiver, a method includes receiving a radio frequency signal at the configurable receiver, operating the configurable receiver in a first mode, the first mode including providing the radio frequency signal to an amplitude detection circuit to determine an amplitude, providing the radio frequency signal to a phase detection circuit to determine a phase, and providing the amplitude and phase to a coordinate rotation digital computer (CORDIC) logic circuit, and operating the configurable receiver in a low power mode upon receiving an indication to selectively disable the amplitude detection circuit, the low power mode including providing the radio frequency signal to the phase detection circuit to determine the phase, and providing the phase and a predetermined constant value in lieu of the amplitude to the CORDIC logic circuit.

A receiver device for a communication system is arranged for receiving a signal comprising a plurality of transponder signals each containing a plurality of carrier signals and comprises: an adjustable spectral filter configurable for selecting a desired transponder signal. Means for performing a non-linear transformation on the selected desired transponder signal, whereby the non-linear transformation is represented by a set of parameter values. At least one receive filter configurable to select at least one desired carrier signal of the non-linearly transformed selected desired transponder signal and, performance measuring means for determining one or more performance metrics on at least one carrier signal of the plurality of carrier signals contained in the desired transponder signal to obtain the set of parameter values.

Circuitry and methods are described for digital signal demodulation. In a configurable receiver, a method includes receiving a radio frequency signal at the configurable receiver, operating the configurable receiver in a first mode, the first mode including providing the radio frequency signal to an amplitude detection circuit to determine an amplitude, providing the radio frequency signal to a phase detection circuit to determine a phase, and providing the amplitude and phase to a coordinate rotation digital computer (CORDIC) logic circuit, and operating the configurable receiver in a low power mode upon receiving an indication to selectively disable the amplitude detection circuit, the low power mode including providing the radio frequency signal to the phase detection circuit to determine the phase, and providing the phase and a predetermined constant value in lieu of the amplitude to the CORDIC logic circuit.

Circuitry and methods are described for digital signal demodulation. In a configurable receiver, a method includes receiving a radio frequency signal at the configurable receiver, operating the configurable receiver in a first mode, the first mode including providing the radio frequency signal to an amplitude detection circuit to determine an amplitude, providing the radio frequency signal to a phase detection circuit to determine a phase, and providing the amplitude and phase to a coordinate rotation digital computer (CORDIC) logic circuit, and operating the configurable receiver in a low power mode upon receiving an indication to selectively disable the amplitude detection circuit, the low power mode including providing the radio frequency signal to the phase detection circuit to determine the phase, and providing the phase and a predetermined constant value in lieu of the amplitude to the CORDIC logic circuit.

A method by which a terminal demodulates a signal in a wireless access system according to one embodiment of the present invention comprises the steps of: receiving a modulation signal having a modulation order of 2.sup.m (m is a natural number); determining a first demodulation constellation arrangement corresponding to a k.sup.th (k is an even number among natural numbers of m or less) bit among m numbers of bits; determining a second demodulation constellation arrangement corresponding to an nth (n is an odd number among natural numbers of m or less) bit among the m numbers of bits; and demodulating the received modulation signal by using the first and second demodulation constellation arrangements, wherein the first constellation arrangement can have a pattern in which a square matrix having a size of 2.sup.(m/2+1)(k/2) is repeated.

This document describes techniques for decoding a convolutionally coded signal using a trellis decoder in a drift robust manner. A convolutionally coded and differentially modulated signal may be received. The signal may be decoded using a trellis. A noise prediction loop may be used to reduce noise characteristics of the signal. A frequency offset estimation loop may be used to reduce a frequency offset drift of the signal. The noise prediction loop and the frequency offset estimation loop may be applied at each branch of the trellis.