A data link layer device and a packet encapsulation method are provided. The data link layer device includes a first and a second first-in-first-out (FIFO) module. The first FIFO module receives and stores multiple first data from an upper-layer module, and removes data gaps from the first data to store the first data in a continuous form. When the first FIFO module is not empty, the first FIFO module generates data of different lengths based on the current amount of data stored temporarily in the first FIFO module and a preset data length. When the data queue of the second FIFO module has enough space to receive the first data, the first FIFO module transfers the first data to the second FIFO module, and the first FIFO module transfers a header including the data length to a header queue of the second FIFO module.

A method and network interface card providing central processor unit efficient storing of data. The NIC receives request for registering a memory address range in the NIC, the request comprising a rewrite protection granularity for the memory address range. When receiving data from a client process, subsequent to registering of said memory address range, said data having an address within the memory address range, the NIC determines whether the rewrite protection granularity of the NIC is reached, when receiving said data. In the event that the rewrite protection granularity is reached, the NIC inactivates the memory address range according to said reached rewrite protection granularity. The auto-inactivated memory address range also provides a rewrite protection of data when storing data. Remote logging or monitoring of data is also enabled, wherein the logging or monitoring may be regarded to become server-less.

A packet processing device is implemented in a network that transmits priority packets and non-priority packets having a lower priority than the priority packets. The packet processing device includes: a packet storage, a gate, a controller, a detector, a generator, and a transmitter. The packet storage stores non-priority packets. The gate is provided on an output side of the packet storage. The controller controls the gate. The detector detects a transmission pattern of the priority packets. The generator generates, based on the transmission pattern of the priority packets, a gate control signal for controlling a gate of a packet processing device implemented in another node. The transmitter transmits the gate control signal to a destination of the priority packets.

The present disclosure is related to multi-queue management techniques and packet reordering techniques for inter-radio access technology (RAT) and intra-RAT traffic steering. The multi-queue management and packet reordering techniques may be used in Multi-Access Management Services (MAMS) framework, which is a programmable framework that provides mechanisms for the flexible selection of network paths in a multi-access (MX) communication environment, based on an application's needs. Other embodiments may be described and/or claimed.

A data link layer device and a packet encapsulation method are provided. The data link layer device includes a first and a second first-in-first-out (FIFO) module. The first FIFO module receives and stores multiple first data from an upper-layer module, and removes data gaps from the first data to store the first data in a continuous form. When the first FIFO module is not empty, the first FIFO module generates data of different lengths based on the current amount of data stored temporarily in the first FIFO module and a preset data length. When the data queue of the second FIFO module has enough space to receive the first data, the first FIFO module transfers the first data to the second FIFO module, and the first FIFO module transfers a header including the data length to a header queue of the second FIFO module.

A method for communicating data between a base station and a terminal device in a wireless telecommunications system, for example an LTE-based system. The wireless communication system uses plural frequency sub-carriers spanning a system frequency band. Physical-layer control information for the terminal device is transmitted from the base station using sub-carriers selected from across the system frequency band, for example to provide frequency diversity. However, higher-layer data for the terminal device is transmitted using only sub-carriers selected from within a restricted frequency band which is smaller than and within the system frequency band. The terminal device is aware of the restricted frequency band, and as such need only buffer and process data within this restricted frequency band during periods where higher-layer data is being transmitted. The terminal device buffers and processes the full system frequency band during periods when physical-layer control information is transmitted.

Embodiments of the invention include methods for handling packets in a communications network. In one embodiment, a method is implemented in an electronic device. The method includes at a first end of a queue in the electronic device, determining admission of a first packet to the first end of the queue based on a length of the first packet, where when the admission of the first packet would cause the queue to become full, the admission is further based on a packet value of the first packet and a data structure tracking packet value distribution of packets in the queue. The method further includes at a second end of the queue, dropping a second packet from the second end of the queue when the second packet's corresponding packet value is marked as to be dropped in the data structure upon admitting packets to the first end of the queue.

Implementations of this disclosure provide data transmission operations and network interface controllers. An example method performed by a first RDMA network interface controller includes obtaining m data packets from a host memory of a first host; sending the m data packets to a second RDMA network interface controller of a second host; backing up the m data packets to a network interface controller memory integrated into the first RDMA network interface controller; determining that the second RDMA network interface controller does not receive n data packets of the m data packets; and in response, obtaining the n data packets from the m data packets that have been backed up to the network interface controller memory integrated into the first RDMA network interface controller, and retransmitting the n data packets to the second RDMA network interface controller.

Implementations of this disclosure provide data transmission operations and network interface controllers. An example method performed by a first RDMA network interface controller includes obtaining m data packets from a host memory of a first host; sending the m data packets to a second RDMA network interface controller of a second host; backing up the m data packets to a network interface controller memory integrated into the first RDMA network interface controller; determining that the second RDMA network interface controller does not receive n data packets of the m data packets; and in response, obtaining the n data packets from the m data packets that have been backed up to the network interface controller memory integrated into the first RDMA network interface controller, and retransmitting the n data packets to the second RDMA network interface controller.

An apparatus with a data input, a data output, a first buffer, a second buffer, and control logic is disclosed. The control logic is equipped to route data packets that are received through the data input to the first buffer or the second buffer and to flag them as valid or invalid, and to provide data packets that are to be output through the data output from the first buffer or the second buffer, equipped to provide a data packet that is to be output through the data output from the first buffer when the data packet is being written into the first buffer at the time of a start of the readout, to provide it from the second buffer when the data packet is being written into the second buffer at the time of a start of the readout.