An image sensor is provided. The image sensor may include an active pixel electrically connected to a column line and configured to provide an output voltage to a pixel node and a bias circuit electrically connected between the pixel node and an earth terminal, and in which a first current flows through a first line electrically connected to the pixel node, wherein the bias circuit includes a first variable capacitor electrically connected to a power supply voltage, and a second variable capacitor electrically connected to the earth terminal, and the magnitude of the first current may be configured to vary based on a ratio of a capacitance of the first variable capacitor to a capacitance of the second variable capacitor. The output voltage may be configured to be adjusted based on the magnitude of the first current.

An inspection method for determining a presence of a defect on a sides surface of a pillar-shaped honeycomb structure including generating strip-shaped images by repeatedly capturing the side surface part by part with an area camera while relatively moving the area camera with respect to the pillar-shaped honeycomb structure; determining the presence or absence of defects based on the strip-shaped images when a number of the strip-shaped images generated is sufficient to cover the entire side surface; a shutter speed when the area camera captures a part of the side surface for generating a single strip-shaped image is 10 to 1000 sec; and each of the strip-shaped images has a length covering the entire height of the pillar-shaped honeycomb structure in a longitudinal direction, and a length of 1 to 10 mm in a width direction.

A solid-state imaging device is capable of simplifying the pixel structure to reduce the pixel size and capable of suppressing the variation in the characteristics between the pixels when a plurality of output systems is provided. A unit cell includes two pixels. Upper and lower photoelectric converters and, transfer transistors and connected to the upper and lower photoelectric converters, respectively, a reset transistor, and an amplifying transistor form the two pixels. A full-face signal line is connected to the respective drains of the reset transistor and the amplifying transistor. Controlling the full-face signal line, along with transfer signal lines and a reset signal line, to read out signals realizes the simplification of the wiring in the pixel, the reduction of the pixel size, and so on.

The present disclosure generally relates to methods and devices for providing touch accommodations to users with tremors or other fine motor impairments to improve the accuracy of such users' touch inputs on touch-sensitive surfaces. Such methods and devices include various approaches for compensating for brief, inadvertent touch inputs; touch inputs with inadvertent motion across the touch-sensitive surface; and/or touch inputs with inadvertent recoil contacts. In some embodiments, the touch accommodations are implemented in a software layer separate from the application layer, such as the operating system.

A solid-state imaging device is capable of simplifying the pixel structure to reduce the pixel size and capable of suppressing the variation in the characteristics between the pixels when a plurality of output systems is provided. A unit cell includes two pixels. Upper and lower photoelectric converters and, transfer transistors and connected to the upper and lower photoelectric converters, respectively, a reset transistor, and an amplifying transistor form the two pixels. A full-face signal line is connected to the respective drains of the reset transistor and the amplifying transistor. Controlling the full-face signal line, along with transfer signal lines and a reset signal line, to read out signals realizes the simplification of the wiring in the pixel, the reduction of the pixel size, and so on.

An image sensor is provided. The image sensor may include an active pixel electrically connected to a column line and configured to provide an output voltage to a pixel node and a bias circuit electrically connected between the pixel node and an earth terminal, and in which a first current flows through a first line electrically connected to the pixel node, wherein the bias circuit includes a first variable capacitor electrically connected to a power supply voltage, and a second variable capacitor electrically connected to the earth terminal, and the magnitude of the first current may be configured to vary based on a ratio of a capacitance of the first variable capacitor to a capacitance of the second variable capacitor. The output voltage may be configured to be adjusted based on the magnitude of the first current.

An imaging device includes a plurality of pixels arranged in a plurality of rows, in which each of the plurality of pixels outputs a pixel signal; a row scanning unit that scans the plurality of pixels on a row basis; and an output unit that outputs first time information corresponding to a processing timing of the pixel signal on one of the plurality of rows and second time information corresponding to the pixel signal on another of the plurality of rows and having a different value from the first time information.

An imaging device includes a plurality of pixels arranged in a plurality of rows, in which each of the plurality of pixels outputs a pixel signal; a row scanning unit that scans the plurality of pixels on a row basis; and an output unit that outputs first time information corresponding to a processing timing of the pixel signal on one of the plurality of rows and second time information corresponding to the pixel signal on another of the plurality of rows and having a different value from the first time information.

A solid-state imaging device is capable of simplifying the pixel structure to reduce the pixel size and capable of suppressing the variation in the characteristics between the pixels when a plurality of output systems is provided. A unit cell includes two pixels. Upper and lower photoelectric converters and, transfer transistors and connected to the upper and lower photoelectric converters, respectively, a reset transistor, and an amplifying transistor form the two pixels. A full-face signal line is connected to the respective drains of the reset transistor and the amplifying transistor. Controlling the full-face signal line, along with transfer signal lines and a reset signal line, to read out signals realizes the simplification of the wiring in the pixel, the reduction of the pixel size, and so on.

Methods, systems, computer-readable media, and apparatuses for dynamic pixel binning are presented. In one example, an image sensor system includes a plurality of sensor elements; a plurality of floating diffusion regions in communication with the plurality of sensor elements, each floating diffusion region of the plurality of floating diffusion regions configured to be selectively enabled; and at least one comparison circuit coupled to at least two floating diffusion regions of the plurality of floating diffusion regions, the comparison circuit configured to: receive input signals from the two floating diffusion regions, compare the input signals, and output a comparison signal based on the comparison of the input signals.